Appendix A: Cpld Register Map - abaco systems RTM311 User Manual

UM082 RTM311 User Manual

7.12 Appendix A: CPLD Register map

Register R/W
0x00 RO
Bit 7..0
0x01 WO
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6-7
0x02 R/W
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4-7
0x03 RO
Bit 0
Bit 1
Bit 2
Bit 3 - 7
0x04 RO
Bit 0
Bit 1
Bit 2
Bit 3
UM082
Description
Version Register
"0x01" initial release with basic functions
Command Register 1
Clear the interrupt register
Test the interrupt inputs
Optional local reset
Reset USB3.0 hub
Reset ETH PHY1
Reset ETH PHY2
Reserved
Command Register 2
Configure M.2 device to SATA or PCIe
•
'1' PCIe
•
'0' SATA (Default)
Enable M.2 device's sleep mode
Enable I2C mode in DisplayPort driver
Enable SM bus mode in SATA driver
Reserved
Interrupt Register
Interrupt from ETH PHY1
Reserved
M.2's I2C alert
Reserved
Status Register
1.1V rail is present
1.8V rail is present
DisplayPort is detected
SD card is detected
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