Connectors; Vpx Connectors - abaco systems RTM311 User Manual

UM082 RTM311 User Manual
7.5

Connectors

The connectors pin assignment tables are broken down as per the VITA 46 connector
nomenclature (RP0, RP1). The wafer positions are also provided.
7.5.1

VPX connectors

7.5.1.1 RP0 connector
Position Wafer type
POS_RP0.1 No Wafer
POS_RP0.2 Power
POS_RP0.3 Power
Single-
POS_RP0.4
ended
Single-
POS_RP0.5
ended
Single-
POS_RP0.6
ended
POS_RP0.7 Differential
POS_RP0.8 Differential
POS_RP0.9 Differential
POS_RP0.10 Differential
POS_RP0.11 Differential
POS_RP0.12 Differential
POS_RP0.13 Differential
POS_RP0.14 Differential
POS_RP0.15 Differential
POS_RP0.16 Differential
UM082
Row G Row F
Vs1 Vs1
Vs3 Vs3
SM2 SM3
GAP* GA4*
GA3* GA2*
TCK GND
GND REF_CLK- REF_CLK+
Gdiscrete1 GND
FPGA-
GND
TX1-
P1-VBAT GND
FPGA-
GND
TX3-
SYS_CON* GND
FPGA-
GND
TX5-
Reserved GND
FPGA-
GND
TX7-
Table 2: RP0 pin assignment
www.abaco.com
Row E Row D
No Wafer
Vs1 No Pad
Vs3 No Pad
GND +12V_AUX
GND +3.3V_AUX
GND +12V_AUX
TDO TDI
GND RES_BUS-
FPGA- FPGA-
TX0- TX0+
FPGA-
GND
TX1+
FPGA- FPGA-
TX2- TX2+
FPGA-
GND
TX3+
FPGA- FPGA-
TX4- TX4+
FPGA-
GND
TX5+
FPGA- FPGA-
TX6- TX6+
FPGA-
GND
TX7+
r1.3
Row C Row B Row A
Vs2 Vs2
Vs3 Vs3
GND SYSRESET* NVMRO
GND SM0
GND GA1* GA0*
GND TMS TRST*
RES_BUS +
FPGA-
GND FPGA-RX0-
RX0+
FPGA-
FPGA-RX1+
RX1-
FPGA-
GND FPGA-RX2-
RX2+
FPGA-
FPGA-RX3+
RX3-
FPGA-
GND FPGA-RX4-
RX4+
FPGA-
FPGA-RX5+
RX5-
FPGA-
GND FPGA-RX6-
RX6+
FPGA-
FPGA-RX7+
RX7-
page 11 of 28
Vs2
Vs3
SM1
GND
GND
GND
GND
GND