Renesas RH850 Series User Manual page 19

Additional document for user’s manual (notes on connection of rh850/e2x series)
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E2 Emulator
Perfor-
Time (1)
mance
mea-
sure-
ment
Time (2)
Time (3)
only for
(
devices
including an
internal
trace RAM)
Pseudo real-time RAM monitoring, Direct
memory modification
Reset Masking
Hot plug-in
Peripheral breaks
Emulator detection by user programs
Download function
Security ID authentication
Debugging when ICUM is enabled
Software tracing
Condition of the
(LPD output)
debugging mode
Target CPU
Destination for
storage
Traced data
Conditions to start
and stop recording
of data
Priority of trace
acquisition
Recording of trace
memory
External trigger
Input signal
input/output
channels
Output signal
channels
R20UT4140EJ0100 Rev.1.00
Jul. 01, 2018
Measurement
From run to break
section
Items measured
Execution time
Performance
32-bit counters
Measurement
From run to break, or between two event points
section
Items measured
Execution time, total execution time, pass count, maximum execution
time, minimum execution time
Performance
32-bit counters (for three sections)
Items measured
Number of instructions executed (all or branches only), number of
interrupts accepted, etc.
Measurement
From run to break, or between two event points
section
Items measured
Maximum value, minimum value, latest value, total value, pass count
Performance
32-bit counters (for four sections)
Available (occupies a bus (steals cycles))
Note: Only available for the general local RAM, cluster RAM, H-Bus, P-
Bus, I-Bus, and CPU peripheral areas.
Available (for selecting whether resets are masked or not during the
execution of a program)
Available
Available
Available
Any 32-bit value which is debugging information from the debugger is
specified and held in the debugging startup register (DBGIFE0) while
the emulator is connected. This function can be used to determine the
state of the emulator being connected or not from within user
programs.
Debugging startup register (DBGIFR0)
Initial value: 0000 0000
Address: FF0B 00E0
Available
Available
Available
Only available in the synchronous debugging mode
Selection of a single CPU. (When the debugger is connected to the
emulator, a single target CPU is selected. If the target CPU is changed,
the debugger must be re-connected to the emulator.)
"E2 storage": memory for storage in the E2 emulator
Software trace data + timestamps (given by the E2 emulator)
Resolution: 8.333 ns, maximum 27 days
Starting and stopping of program execution (breaks)
Real-time trace mode (priority given to speed)
Non-real-time trace mode (priority given to data)
Ring mode (overwriting mode)
Trace-full stop mode
Trace-full break mode
E2 expansion interface: 2 (ch. 0: pin 11, ch. 1: pin 12)
E2 expansion interface: 2 (ch. 0: pin 9, ch. 1: pin 10)
4. Functional overview
H
H
Page 19 of 37

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