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3 7 63 1515 0
• IC701 MECHANISM CONTROL (HD6433032SK12F)/VIDEO board
Pin No.
Pin Name
1
CMD0
2
CMD1
3
CMD2
4
CMD3
5
SACK
6
QINT
7
VDAC-XLAT
8
DF-XLAT
9
P90/TXD
10
SUBQ
11
SQCK
12
V
SS
13 to 20
D0 to D7
21
V
CC
22 to 29
A0 to A7
30
V
SS
31 to 35
A8 to A12
36 to 39
A13 to A16
40, 41
A17, A18
42
A19
43
WAIT
TE
44
MD0
L 13942296513
45
MD1
φ
46
47
STBY
48
RESET
49
NM1
50
V
SS
51
EXTAL
52
XTAL
53
V
CC
54
AS
55
RD
56
WR
57
RESO
58
AV
SS
59
TEST0
60
TEST1
www
61
TE
62
SENS
63
DAC-SELECT
.
64
NPIN
65
VSS
66
VREQ
67
VREF
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I/O
Input/output terminal exchanging data bus 0 with IIC interface (IC901)
I/O
Input/output terminal exchanging data bus 1 with IIC interface (IC901)
I/O
Input/output terminal exchanging data bus 2 with IIC interface (IC901)
I/O
Input/output terminal exchanging data bus 3 with IIC interface (IC901)
I/O
Outputs command acknowledge to IIC interface (IC901)
O
Outputs command output pulses to IIC interface (IC901)
O
Serial data latch pulse output to Video D/A converter (IC401)
O
O
Serial data latch pulse output to Audio D/A converter (IC101)
Not used
–
Sub Q 80bit input (CXD2545Q)
I
SQSO readout clock output (CXD2545Q)
O
Ground
–
Data bus input/output (IC201, 751)
I/O
–
Connect to the power supply (+5V)
Address bus output (IC201, 751)
O
Ground
–
O
Address bus output (IC201, 751)
Address bus output (Not used)
O
Addres bus output (IC772)
O
Address bus output (Not used)
O
BUS control wait input (IC201)
I
Operation mode setting terminal (Connected to +5V)
I
Operation mode setting terminal (Connected to ground)
I
System clock output (Not used)
O
Shifts to the hardware standby mode when the standby terminal becomes "Low".
I
(Unable to use H level fixed) (Connected to +5V)
Set into reset when the reset input pin becomes "Low". (IC901)
I
Requests mask disable interruption. (Unable to use H level fixed) (Connected to +5V)
I
Ground
–
Connected to the Crystal oscillator. The EXTAL pin is also able to input external clocks.
I
(10 MHz)
Connected to the Crystal oscillator. (10 MHz)
I
Power supply (+5V)
–
When the address strobe pin is "Low", indicates that address outputs on the address bus
O
are valid. (IC772)
When the read pin is "Low", indicates that the external addresses space is in the read state.
O
(IC201, 751)
When the read pin is "Low", indicates that the external addresses space is in the write
O
state and the data bus are valid. (IC201, 751)
Reset output (Not used)
O
A/D converter (Pin62-69) ground
–
Color-bar test input ("L" = test)
I
AFADJ test input ("L" = test)
I
ADJ test input ("L" = test)
I
I
Internal state (SENSE) monitor input (CXD2545Q)
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y
Audio D/A converter select mode setting terminal (Connected to +5V)
I
i
NTSC/PAL output mode setting terminal (0V : NTSC, 1.5V : AUTO, 3V : PAL)
I
–
Ground
Not used
I
A/D converter (Pin62-69) reference voltage input (Connected to +5V)
I
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2 9
8
Function
Q Q
3
6 7
1 3
1 5
co
.
— 91 —
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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