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3 7 63 1515 0
• IC301 NOISE REDUCTION (CXD1854Q)/VIDEO board
Pin No.
Pin Name
1
V
SS
2
BI7
3
BI6
4
BI5
5
BI4
6
BI3
7
BI2
8
BI1
9
BI0
10
V
SS
11
Y/GI7
12
Y/GI6
13
Y/GI5
14
Y/GI4
15
Y/GI3
16
Y/GI2
17
Y/GI1
18
Y/GI0
19
V
SS
20
C/RI7
21
C/RI6
TE
22
C/RI5
L 13942296513
23
C/RI4
24
C/RI3
25
C/RI2
26
C/RI1
27
C/RI0
28
V
DD
29
XCS
30
XSCK
31
SDI
32
SDO
33
SXP COM
34
BLCKNR0
35
BLCKNR1
36
BLCKSIZE
37
V
DD
38
BLCKST0
39
BLCKST1
40
BLCKST2
41
V
SS
42
BLOCKST3
43
CORON
www
44
ADVD
45
ADVS
46
HVCC
.
47
HVCCT
48
VCP
49
VCPT
50
V
SS
http://www.xiaoyu163.com
I/O
Ground
–
I
[MSB]
I
I
I
B input 0–7 (Connect to ground)
I
I
I
I
[LSB]
–
Ground
I
[MSB]
I
I
I
G (Y) input 0–7
I
I
I
I
[LSB]
–
Ground
I
[MSB]
I
I
I
R (Cb/Cr) input 0–7
I
I
I
I
[LSB]
–
Power supply (+5V)
I
Chip select input from IIC interface (IC901)
I
Serial clock input from IIC interface (IC901)
I
Serial data input from IIC interface (IC901)
Serial data output. (Not used)
O
I
Serial/parallel select
I
NR effect level control input
NR effect level control input
I
I
Block size select input
–
Power supply (+5V)
RAS signal for DRAM (Connected to ground)
I
I
CAS signal for DRAM (Connected to ground)
I
Write enable signal for DRAM (Connected to ground)
–
Ground
I
DRAM data input (Connected to ground)
I
DRAM data input (Connected to +5V)
I
DRAM data input (Connected to +5V)
I
DRAM data input (Connected to ground)
x
ao
u163
y
DRAM data input (Not used)
I
i
I
DRAM data input (Connected to +5V)
I
DRAM data input (Not used)
DRAM data input (Connected to ground)
I
–
Ground
— 86 —
http://www.xiaoyu163.com
2 9
8
Function
Q Q
3
6 7
1 3
1 5
co
.
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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