Sony SRX-R320 Service Manual page 332

Data IN 10bit/77MHz
004-B8 DFD_IN_UP_OD_RED
004-J5 DFD_IN_UP_OD_GRN
DFD_IN_UP_OD_BLU
004-B6,004-F5
RB0804
1
RB0800
RB0804
RB0800
RB0800
RB0800
RB0801
RB0801
RB0801
RB0801
RB0806
RB0802
RB0802
RB0802
RB0802
RB0803
RB0803
RB0803
RB0803
RB0804
RB0805
2 RB0805
RB0805
RB0807
RB0805
RB0807
RB0807
RB0807
RB0806
RB0806
RB0804
RB0806
3
4
5
004-F6
004-F6
004-K8
A B
PR-300 (8/25)
RB808
47
22
71 85
*ORED[9] 3 4 1 2
RIN_9[A7] ROUT_A9[K2]
1 2 252 152 3 4
*ORED[8]
RIN_8[D9] ROUT_A8[K3]
253 9
*ORED[7] 1 2 5 6
RIN_7[D8] ROUT_A7[J1]
70 151
*ORED[6] 5 6 7 8
RIN_6[A8] ROUT_A6[J3]
3 4 139 210 1 2
*ORED[5]
RIN_5[B8] ROUT_A5[J4]
200 8
*ORED[4] 7 8 3 4
RIN_4[C8] ROUT_A4[H1]
69 83
*ORED[3] 7 8 5 6
RIN_3[A9] ROUT_A3[H2]
3 4 138 150 7 8
*ORED[2]
RIN_2[B9] ROUT_A2[H3]
199 7
*ORED[1] 5 6
RIN_1[C9] ROUT_A1[G1]
68 82
*ORED[0] 1 2
RIN_0[A10] ROUT_A0[G2]
RB809
1 2 143 88
*OGRN[9]
GIN_9[B4] ROUT_B9[N2] 22
74 13
*OGRN[8] 7 8
GIN_8[A4] ROUT_B8[N1]
203 214
*OGRN[7] 5 6
GIN_7[C5] ROUT_B7[N4]
142 87
*OGRN[6] 3 4
GIN_6[B5] ROUT_B6[M2]
73 12
*OGRN[5] 1 2
GIN_5[A5] ROUT_B5[M1]
7 8 202 153
*OGRN[4]
GIN_4[C6] ROUT_B4[L3]
141 86
*OGRN[3] 5 6
GIN_3[B6] ROUT_B3[L2]
72 11
*OGRN[2] 3 4
GIN_2[A6] ROUT_B2[L1] RB810
1 2 201 213 22
*OGRN[1]
GIN_1[C7] ROUT_B1[M4]
140 211
*OGRN[0] 7 8
GIN_0[B7] ROUT_B0[K4]
4 161
*OBLU[9] 7 8 1 2 *GRN1[11]
BIN_9[D1] GOUT_A9[V4]
1 2 3 22 3 4
*OBLU[8] *GRN1[10]
BIN_8[C1] GOUT_A8[Y3]
79 95
*OBLU[7] 5 6 5 6
BIN_7[D2] GOUT_A7[W3]
1 160
*OBLU[6] 7 8 7 8
BIN_6[A1] GOUT_A6[V3]
3 4 146 21 1 2
*OBLU[5]
BIN_5[D3] GOUT_A5[Y2]
77 94
*OBLU[4] 5 6 3 4
BIN_4[B2] GOUT_A4[W2]
145 159
*OBLU[3] 1 2 5 6
BIN_3[C3] GOUT_A3[U3]
256 20
*OBLU[2] 3 4 7 8
BIN_2[D5] GOUT_A2[Y1]
75 18
*OBLU[1] 7 8
BIN_1[A3] GOUT_A1[V1]
5 6 204 92
*OBLU[0]
BIN_0[C4] GOUT_A0[U2]
RB811
164
5 6
22
GOUT_B9[V7]
221
3 4
GOUT_B8[U7]
25
47
GOUT_B7[Y6]
98
GOUT_B6[W6]
220
GOUT_B5[U6]
24
GOUT_B4[Y5]
97
GOUT_B3[W5]
162
GOUT_B2[V5] RB812
23 22
GOUT_B1[Y4]
96
GOUT_B0[W4]
64
1 2 *BLU1[11]
BOUT_A9[A14]
133
3 4 *BLU1[10]
BOUT_A8[B14]
194
5 6 *BLU1[9]
BOUT_A7[C14]
63 7 8
*BLU1[8]
BOUT_A6[A15]
132
1 2 *BLU1[7]
BOUT_A5[B15]
193
3 4 *BLU1[6]
BOUT_A4[C15]
62 5 6
*BLU1[5]
BOUT_A3[A16]
131
7 8 *BLU1[4]
BOUT_A2[B16]
76 247
NC4[A2] BOUT_A1[D14]
57 61
NC3[B20] BOUT_A0[A17]
RB813
144 249
22
NC8[B3] BOUT_B9[D12]
127 67
NC7[C19] BOUT_B8[A11]
244 136
NC12[D17] BOUT_B7[B11]
205 197
NC9[D4] BOUT_B6[C11]
231 66
NC11[U17] BOUT_B5[A12]
218 135
NC10[U4] BOUT_B4[B12]
93 196
NC5[V2] BOUT_B3[C12]
110 65
NC6[W18] BOUT_B2[A13]
19 134
NC1[W1] BOUT_B1[B13]
38 195
NC2[Y19] BOUT_B0[C13]
IC800 (3/4)
CXD9713GF
IC800 (1/4)
CXD9713GF
R804
+3.3V
22
254 16
CS[D7] HST[T1]
209 157
MUTE[H4] PCG[R3]
255 216
LED[D6] VCK[R4]
206 14
DEBUG[E4] VST[P1]
129 15
002-G8 BYPASS_DFD_UP_OD_UP BYPASS[B18] PID[R1]
208 156
TEST[G4] XFR[P3]
215
SHST[P4]
GND 89
INV[P2]
217
FRP[T4]
90
HCK[R2]
R800 22 5 246
HDQDI_UP2 HSYNC[E1] DHP[D15]
6 192
R801 22
VDQDI_UP2 VSYNC[F1] DVP[C16]
191 155
CLKQDI_UP_OD_U DOTCLK[C17] RCLK[N3]
91
Clock 77MHz GCLK[T2]
251
R805
BCLK[D10]
22
224
EXTMODE[U10]
167
EXTUPPMOD[V10]
R806
22
R802 22
R803 22
C
PR-300 (8/25)
SUFFIX: -15 SUFFIX: -15
47
*RED1[11] *ORED[9] 5 6
RB0818
7 8
*RED1[10] *ORED[8]
RB0814
*RED1[9] *ORED[7] 7 8
RB0818
*RED1[8] *ORED[6] 3 4
RB0814
5 6
*RED1[7] *ORED[5]
RB0814
*RED1[6] *ORED[4] 1 2
RB0814
*RED1[5] *ORED[3] 1 2
RB0815
5 6
*RED1[4] RB0815 *ORED[2]
ROUT_UP_OD_A1 *ORED[1] 3 4
RB0815
ROUT_UP_OD_A0 *ORED[0] 7 8
RB0815
7 8
RB0820 *OGRN[9]
*OGRN[8] 1 2
RB0816
*OGRN[7] 3 4
RB0816
*OGRN[6] 5 6
RB0816
*OGRN[5] 7 8
RB0816
1 2
*OGRN[4]
RB0817
*OGRN[3] 3 4
RB0817
*OGRN[2] 5 6
RB0817
7 8
ROUT_UP_OD_B1 *OGRN[1]
RB0817
ROUT_UP_OD_B0 *OGRN[0] 1 2
RB0818
*OBLU[9] 1 2
RB0819
7 8
RB0819 *OBLU[8]
*GRN1[9] *OBLU[7] 3 4
RB0819
*GRN1[8] *OBLU[6] 1 2
RB0821
5 6
*GRN1[7] RB0819 *OBLU[5]
*GRN1[6] *OBLU[4] 3 4
RB0821
*GRN1[5] *OBLU[3] 7 8
RB0821
*GRN1[4] *OBLU[2] 5 6
RB0821
GOUT_UP_OD_A1 *OBLU[1] 1 2
RB0820
3 4
GOUT_UP_OD_A0 *OBLU[0]
RB0820
3 4
RB0818
5 6
RB0820
47
GOUT_UP_OD_B1
GOUT_UP_OD_B0
BOUT_UP_OD_A1
BOUT_UP_OD_A0
BOUT_UP_OD_B1
BOUT_UP_OD_B0
CL800
CL801
CL802
C-132 C-132
D E
RB824
22
71 85
1 2 *RED1[3]
RIN_9[A7] ROUT_A9[K2]
252 152 3 4
*RED1[2]
RIN_8[D9] ROUT_A8[K3]
253 9
5 6 *RED1[1]
RIN_7[D8] ROUT_A7[J1]
70 151
7 8 *RED1[0]
RIN_6[A8] ROUT_A6[J3]
139 210
RIN_5[B8] ROUT_A5[J4]
200 8
RIN_4[C8] ROUT_A4[H1]
69 83
RIN_3[A9] ROUT_A3[H2]
138 150 R812
RIN_2[B9] ROUT_A2[H3]
22
199 7
ROUT_UP_OD_A1
RIN_1[C9] ROUT_A1[G1]
68 82
ROUT_UP_OD_A0
RIN_0[A10] ROUT_A0[G2]
143 88 R813
GIN_9[B4] ROUT_B9[N2]
22
74 13
GIN_8[A4] ROUT_B8[N1]
203 214
GIN_7[C5] ROUT_B7[N4]
142 87
GIN_6[B5] ROUT_B6[M2]
73 12
GIN_5[A5] ROUT_B5[M1]
202 153
GIN_4[C6] ROUT_B4[L3]
141 86
GIN_3[B6] ROUT_B3[L2]
72 11
GIN_2[A6] ROUT_B2[L1]
R814 22
201 213
ROUT_UP_OD_B1
GIN_1[C7] ROUT_B1[M4]
140 211 R815 22
ROUT_UP_OD_B0
GIN_0[B7] ROUT_B0[K4]
4 161
1 2 *GRN1[3]
BIN_9[D1] GOUT_A9[V4]
3 22 3 4
*GRN1[2]
BIN_8[C1] GOUT_A8[Y3]
79 95
5 6 *GRN1[1]
BIN_7[D2] GOUT_A7[W3]
1 160
7 8 *GRN1[0]
BIN_6[A1] GOUT_A6[V3]
146 21
BIN_5[D3] GOUT_A5[Y2] RB822
77 94 22
BIN_4[B2] GOUT_A4[W2]
145 159
BIN_3[C3] GOUT_A3[U3]
256 20
R816
BIN_2[D5] GOUT_A2[Y1]
22
75 18
GOUT_UP_OD_A1
BIN_1[A3] GOUT_A1[V1]
204 92
GOUT_UP_OD_A0
BIN_0[C4] GOUT_A0[U2]
164
R817
GOUT_B9[V7]
22
221
GOUT_B8[U7]
25
GOUT_B7[Y6]
98
GOUT_B6[W6]
220
GOUT_B5[U6]
24
GOUT_B4[Y5]
97
GOUT_B3[W5]
162
GOUT_B2[V5]
R818 22
23
GOUT_UP_OD_B1
GOUT_B1[Y4]
96 22
R819 GOUT_UP_OD_B0
GOUT_B0[W4]
64
1 2 *BLU1[3]
BOUT_A9[A14]
133
3 4 *BLU1[2]
BOUT_A8[B14]
194
5 6 *BLU1[1]
BOUT_A7[C14]
63 7 8
*BLU1[0]
BOUT_A6[A15]
132
BOUT_A5[B15] RB823
193
22
BOUT_A4[C15]
62
BOUT_A3[A16]
131
R820
BOUT_A2[B16]
22
76 247
BOUT_UP_OD_A1
NC4[A2] BOUT_A1[D14]
57 61
BOUT_UP_OD_A0
NC3[B20] BOUT_A0[A17]
144 249
R821
NC8[B3] BOUT_B9[D12]
22
127 67
NC7[C19] BOUT_B8[A11]
244 136
NC12[D17] BOUT_B7[B11]
205 197
NC9[D4] BOUT_B6[C11]
231 66
NC11[U17] BOUT_B5[A12]
218 135
NC10[U4] BOUT_B4[B12]
93 196
NC5[V2] BOUT_B3[C12]
110 65
R822
NC6[W18] BOUT_B2[A13]
22
19 134
BOUT_UP_OD_B1
NC1[W1] BOUT_B1[B13]
38 195
BOUT_UP_OD_B0
NC2[Y19] BOUT_B0[C13]
R823
22
IC801 (3/4)
CXD9713GF
DFD_OUT_UP_RED1
DFD_OUT_UP_GRN1
DFD_OUT_UP_BLU1
IC801 (1/4)
CXD9713GF
+3.3V
R824
22
254 16
CS[D7] HST[T1]
209 157
MUTE[H4] PCG[R3]
255 216
LED[D6] VCK[R4]
206 14
DEBUG[E4] VST[P1]
129 15
002-G8 BYPASS_DFD_UP_OD_LW BYPASS[B18] PID[R1]
208 156
TEST[G4] XFR[P3]
215
SHST[P4]
89
INV[P2]
217
FRP[T4]
90
HCK[R2]
5 246
HSYNC[E1] DHP[D15]
6 192
VSYNC[F1] DVP[C16]
191 155
004-K8 CLKQDI_UP_OD_D DOTCLK[C17] RCLK[N3]
91
Clock 77MHz GCLK[T2]
251
R825
BCLK[D10]
22
224
EXTMODE[U10]
167
EXTUPPMOD[V10]
R826
GND 22
F
Data OUT 12bit/77MHz
014-J1
018-J1
022-J1
PR-300 (8/25)
BOARD NO. 1-873-515-15
SRX-R320
G H