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TxCLK OUT
T/7
RxCK IN
Rx IN3
RxOUT23
RESERVED
Rx IN2
RxOUT26
DE
RxOUT18
Rx IN1
B01
RxOUT7
Rx IN0
G00
Panel Specification
TIMING DIAGRAM of LVDS
RxOUT17
RxOUT16
B07
B06
RxOUT25
RxOUT24
GND
GND
RxOUT15
RxOUT14
B00
G05
RxOUT4
RxOUT6
R05
R04
T
RxOUT11
RxOUT10
G07
G06
RxOUT22
RxOUT21
B05
B04
RxOUT12
RxOUT13
G04
G03
RxOUT3
RxOUT2
R03
R02
RxOUT5
RxOUT27
R07
R06
RxOUT20
RxOUT19
B03
B02
RxOUT9
RxOUT8
G02
G01
RxOUT1
RxOUT0
R01
R00
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