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IC BLOCK DIAGRAMS
IC7A5 HD74HC4053FP
16
V
CC
6
Inh
11
A
Level
10
Converter
B
9
C
8
V
SS
7
V
EE
12
X
0
13
X
1
2
Y
0
1
Y
1
5
Z
0
3
Z
1
FUNCTION TABLE
CONTROL INPUTS
INHIBIT
L
L
L
L
L
L
L
L
H
H
: HIGH VOLTAGE LEVEL
L
: LOW VOLTAGE LEVEL
X
: IMMATERIAL
PCB-MAIN DRIVE1
IC5M0 ET2081F0A
OSCI
VSYNC
VMODE1~2
8
Bynary to 1 of 2
Decoder with
Inhibit
14
15
4
ON SWITCH
SELECT
C
B
A
L
L
L
Z
Y
X
0
0
0
L
L
H
Z
Y
X
0
0
1
L
H
L
Z
Y
X
0
1
0
L
H
H
Z
Y
X
0
1
1
H
L
L
Z
Y
X
1
0
0
H
L
H
Z
Y
X
1
1
1
H
H
L
Z
Y
X
1
1
0
H
H
H
Z
Y
X
1
0
1
X
X
X
-
7
78 27 3
HOR. COUNT SET
9
HOR. COUNT
HOR. RESET
SIGNAL GEN.
77
4,5
THIN OUT SET
THIN OUT POSITION COUNT
SHCLK PHASE • POSITION SET
SHENB WIDTH SET
NRG POSITION • WIDTH SET
CLP POSITION • WIDTH SET
MASK SIGNAL POSITION • INDICATION LIMIT SET
C1+
C1-
C2+
C2-
X
T1 IN
Y
TTL/CMOS
INPUTS
Z
T2 IN
R1 OUT
TTL/CMOS
OUTPUTS
R2 OUT
26
OFH
ENBX1,ENBX2
SIGNAL
PHASE
GEN.
DIFFERENCE
VER.
STANDARD
CLOCK
VER. COUNT
VER. RESET
SIGNAL GEN.
DYOUT POSITION SET
DYOUT GEN.
CLYOUT GEN.
FRP GEN.
SHCLK GEN.
NGR GEN.
CLP GEN.
MSKOUT GEN.
IC7A6 MAX202CSE
Vcc
16
1
+5V TO +10V
2
V+
VOLTAGE
3
DOUBLER
4
+10V TO -10V
6
V-
5
VOLTAGE
INVERTER
+5V
400k
11
14
T1
T1 OUT
+5V
400k
10
7
T2
T2 OUT
12
13
R1
R1 IN
5k
9
8
R2
R2 IN
5k
15
GND
DXOUT
POSITION SET
63~67
DXOUT POSITION
ADJDX4~0
FINE ADJ.
6
PMODE
53,55,57
DXOUT(R:G:B)
DXOUT GEN.
17,18,19
ADJEP3~0
43,45,47
ENBX1(R:G:B)
EMBX1,EMBX2
44,46,48
ENBX2(R:G:B)
CLXOUT GEN.
54,56,58
CLXOUT(R:G:B)
76
STATE
28
VRESET
51
DYOUT
HOR.
68~71
ADJY4~0
CHANGE
52
POINT
CLYOUT
ADJ.
59
FRP
62
IMODE
31
SHENB
33~39
SHCLK1~7
50
NRG
29,30
CLP1~2
42
MSKOUT
RS-232
OUTPUTS
RS-232
INPUTS
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