Related Manuals for Texas Instruments TRF4900
Summary of Contents for Texas Instruments TRF4900
- Page 1 TRF4900 RF Evaluation Kit User’s Guide April 2001 Mixed-Signal RF Products SWRU003B...
- Page 2 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability.
- Page 3 Device parameters measured, using these boards, are not representative of any final data- sheet or of a final production version. Texas Instruments does not represent or guarantee that a final version will be made available after device evaluation.
- Page 4 About This Manual This document is intended to introduce the TRF4900 evaluation module (EVM) and familiarize the reader with setting up and testing the TRF4900 EVM using the evaluation software in a typical laboratory environment. How to Use This Manual This document contains the following chapters: Chapter 1 −...
-
Page 6: Table Of Contents
Running Title—Attribute Reference Contents Overview ............... . Purpose . - Page 7 3-16 3−13 Block Diagram for Testing of the TRF4900 EVM Transmitter Section With an External Pulse Generator ........... . .
-
Page 8: Overview
Chapter 1 Overview This chapter provides an overview of the TRF4900 evaluation module (EVM). Topic Page Purpose ............ -
Page 9: Purpose
PC parallel port interface and operates from 850 MHz to 950 MHz from 2.2 V to 3.6 V. The TRF4900 EVM contains two SMA connectors that allow the user to observe transmitted data, to test the VCO tuning range, or to feed in an external RF input. -
Page 10: Block Diagram
Block Diagram 1.3 Block Diagram Figure 1−1 shows the block diagram for the TRF4900. Figure 1−1. TRF4900 Block Diagram PD_OUT1 PD_OUT2 PLL_VCC LOCKDET PD_SET PA_OUT Power Amplifier PA_GND VCO_TANK1 VCO_TANK2 PA_VCC PLL_GND TRF4900 DIG_GND DIG_GND CLOCK XOSC2 Direct Digital Synthesizer... -
Page 12: Evaluation Board
Chapter 2 Evaluation Board This chapter describes the EVM and its operation. Topic Page Schematics ........... 2−2 Parts List . -
Page 13: Schematics
Schematics 2.1 Schematics DATA... - Page 14 Schematics Evaluation Board...
-
Page 15: Top Side Silkscreen And Drawing
Top Side Silkscreen and Drawing 2.1.1 Top Side Silkscreen and Drawing... -
Page 16: Bottom Side Silkscreen And Drawing
Top Side Silkscreen and Drawing 2.1.2 Bottom Side Silkscreen and Drawing Evaluation Board... -
Page 17: Parts List
Parts List Evaluation Board... - Page 18 Parts List Evaluation Board...
- Page 19 Parts List Evaluation Board...
- Page 20 Parts List Evaluation Board...
-
Page 21: Evm Dc Voltage Setup
2.3 EVM DC Voltage Setup The evaluation board should be used with a dc power supply voltage of 8 V nominal. Figure 2−1 details the dc voltage supply setup for the TRF4900 EVM. Figure 2−1. TRF4900 EVM DC Voltage Setup V out for LM317 voltage regulator is equal to: Vout = 1.25(1+((R32+R34)/R31)) -
Page 22: Serial Interface And Pc Port Pin Out
Serial Interface and PC Port Pin Out 2.4 Serial Interface and PC Port Pin Out Figure 2−2 details the serial interface portion of the TRF4900 EVM. Figure 2−2. TRF4900 EVM Serial Interface DATA DATA CLOCK CLOCK STROBE LOCKDET 0.1uF STROBE... -
Page 23: Standard Pc Parallel Port
PC Input Ground Paper Empty PC Input Select PC Input Auto Feed PC Output Error PC Input Initialize Printer PC Output Select Input PC Output Note: The TRF4900 EVM uses pins 2–9 for signals from the PC to the EVM. 2-12... -
Page 24: Jumper Connections
Standard PC Parallel Port 2.6 Jumper Connections The default position of the jumpers on the TRF4900 EVM are configured as shown below. To R1 and C2 (Loop Filter) To V To R5 and R6 (VCO Tank) To STDBY Test Point To Ground JP1 is a 0-Ω... -
Page 25: Connectors And Test Points
Test point TP1 is used to monitor the tuning voltage applied to the VCO circuit by the PLL circuit. LDET TP The LDET test point is used to monitor the lock detect line of the TRF4900. MODE TP The MODE test point is used to monitor the MODE line. -
Page 26: Adjustments
Connectors and Test Points 2.7.3 Adjustments Resistor R32 is varied to adjust the VCC1 voltage applied to IC1 (TRF4900). 2.7.4 LED Indicators VCC LED If JP4 is installed, the VCC LED is illuminated when voltage is applied to IC1. LDET LED The LDET LED is illuminated when the lock detect line IC1−23 (TRF4900) - Page 27 2-16...
-
Page 28: Software User's Guide
Chapter 3 Software User's Guide This chapter describes the Windows-based software application that accompanies the EVM. Topic Page Introduction ..........3−2 Main Program Screen . -
Page 29: Introduction
However, if the operating system is Windows 95/98, the software application can run on its own. Both the Windows NT Driver and the TRF4900 software are provided on diskette. Your system administrator must install the Windows NT Driver if you do not have administrative privileges on your computer. -
Page 30: Main Program Screen
Frequency Chip Layout Screen Computer Printer Port Press to Program the TRF4900 LPT1 or LPT2 NOTE: When word bits are displayed in RED, the Send Words Now (F12) button on the main program screen must be pressed for changes to be updated. -
Page 31: Mode Options
Most of the other control boxes follow this format. The first line indicates what portion of the TRF4900 is being controlled. The next two lines indicate the bit value. If the PLL is off, bit 12 of Words C and D are equal to 0. If it is on, bit 12 is equal to 1. -
Page 32: Words
Clicking on the box next to the word can individually send each word. Clicking on the Send Words Now (F12) button on the main program screen or pressing F12 on the keyboard, sends all the words to the TRF4900. 3.2.7... -
Page 33: Chip Layout Screen
The chip layout screen can be accessed by double clicking on the left mouse button in the Help section of the main program screen. The chip layout screen appears as a simplified internal schematic of the TRF4900 as shown in Figure 3−2. -
Page 34: Pll/Modulation Options Screen
TXData, and mode control lines from the chip layout screen. The user can select FSK Modulation. The FSK Test button, located on the chip layout screen, will allow the user to transmit data using the TRF4900. Options for use with the FSK Test button are the pulse repetition frequency (PRF), which is defaulted to 100 Hz, and the Run Time (Min), which can be set in minutes. -
Page 35: Pll/Modulation Options Screen
High (MHz), Fout: TX_Data Low (MHz) frequencies, and their difference (Delta Fout kHz), are calculated and displayed. Press the Send Bits button located on the PLL/Modulation Options screen to program the TRF4900. Press the Close button to return to the chip layout screen. -
Page 36: Testing Of Transmitter
Testing of Transmitter 3.5 Testing of Transmitter To test the transmitter section of the TRF4900, perform the following steps: Step 1: Test Setup: Set up the test bench as shown in Figure 3−4. Figure 3−4. Block Diagram for Testing of the TRF4900 EVM Transmitter Section... -
Page 37: Main Program Screen
Testing of Transmitter Step 2: Software Programming: To test the TRF4900 transmitter section, set the main program screen and the chip layout screen as shown in Figure 3−5 and Figure 3−6. Figure 3−5. Main Program Screen Double Click Here With Left Mouse... -
Page 38: Chip Layout Screen
Testing of Transmitter Chip Layout Screen of TRF4900 Software for Transmitter Testing Figure 3−6. Chip Layout Screen Clicking Here Sets Power Amp Attenuation (0 dB, 10 dB, 20 dB) or Turn the Power Amp Off Press to Program TRF4900 After setup is complete, press the Send Words button on the chip layout screen or the Send Words Now (F12) button on the main program screen to send the programming words to the TRF4900. -
Page 39: Spectrum Analyzer
Testing of Transmitter Step 3: Spectrum Analyzer Setup and Clock Offset Procedure Setup the spectrum analyzer to observe the following: Figure 3−7. Spectrum Analyzer Clock Offset Procedure 1) Use the test setup as shown in Figure 3−4 and transmitter software setup shown in Figure 3−5 and Figure 3−6. -
Page 40: Input Of Frequency Error
Testing of Transmitter Figure 3−8. Input of Frequency Error Frequency Error is entered here Press Update CLK button Figure 3−9. Main Panel Display After Clock Offset Is Applied Software User’s Guide 3-13... -
Page 41: Chip Layout View For Fsk Modulation Output Test
Figure 3−10. Chip Layout View for FSK Modulation Output Test Select This Button to Start the FSK Modulation Test Select to Program the TRF4900 Select This Button With Mouse to Set FSK Frequency Set the DVx bits, as shown in Figure 3−11, by double clicking inside each DVx box to set the value to either a 1 or 0. -
Page 42: Pll/Modulation Options Screen
Testing of Transmitter Figure 3−11. PLL/Modulation Options Screen DV6 Display Set to 1 Frequency 915 MHz Frequency 915.10 MHz FSK Deviation of 100 kHz Send Bits Button Press the Send Words button on the chip layout screen or the Send Words Now (F12) on the main program screen. -
Page 43: Fsk Output From Transmitter
This is FSK modulation with f 1 equal to 915.0 MHz, f 2 equal to 915.10-MHz and 100-Hz data rate. The f 1 frequency is the 0 frequency. The f 2 frequency is the 1 frequency. Figure 3−13. Block Diagram for Testing of the TRF4900 EVM Transmitter Section With an External Pulse Generator... -
Page 44: Fsk Output From Transmitter With An External Modulation
Testing of Transmitter To use an external pulse generator to supply transmit data, set up the test bench as shown in Figure 3−13. Perform the FSK modulation output test as described in the previous section. In this new setup, an external pulse generator is providing the modulation. - Page 45 3-18...