Table 15: Bowtie Mode; Table 16: Timing Display - Tektronix WFM8200 Technical Reference

Specifications

Table 15: Bowtie mode

Characteristic
Common SD
Mode
HD
Rejection
Ratio
Interchannel Timing Match
Functional Description

Table 16: Timing display

Characteristic
Input Timing Relative to External
Reference
Timing Display Zero Definition
Operation with input and reference
being different formats
14
Performance requirement
≥ 34 dB at 2.5 MHz
≥ 34 dB at 5 MHz
± 0.5 ns
Performance requirement
WVR8200 and WVR8300 Specifications and Performance Verification
Reference information
Displays Y minus Pr and Y minus Pb signals.
Requires bowtie signal to be useful. Null
in center indicates the channels are time
aligned
Reference information
Display of Vertical and Horizontal timing
offset graphically and numerically. One clock
cycle resolution
Patented proprietary display. Display Timing
difference between input and Ref at rear
panel or relative to an offset saved by the
user
For vertical timing, conforms to SMPTE
RP168-2002
For horizontal timing, zero delay analog
signals have coincident syncs. For digital
signals, timing is such that if converted to
analog by a WFM601A, then the resultant
analog signal is coincident with the reference
Timing zero is equivalent to nominal zero
delay on TG700 or TG8000. Also agrees
with signal that shows minimal shift on the
waveform display when going from internal
to external
Vertical timing, according to SMPTE RP168,
specifies that the lines with the start of the
broad pulses are aligned
Compatible with any combination of frame
and field rates. (See Table 45 on page 37.)
In cases where there are multiple ways to
interpret the phase relationship, multiple
indicators of the phase will be shown. The
numeric display will follow the smallest
phase offset