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ON Semiconductor NB4N11MDTEVB User Manual

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NB4N11MDTEVB
Evaluation Board User's
Manual for NB4N11M
Description
ON Semiconductor has developed an evaluation board for
the NB4N11M device as a convenience for the customers
interested in performing their own device engineering
assessment. This board provides a high bandwidth 50 W
controlled impedance environment. The pictures in Figure 1
show the top and bottom view of the evaluation board, which
can be configured in several different ways.
This NB4N11M evaluation board manual contains:
Appropriate Lab Setup
Assembly Instructions
Bill of Materials
This manual should be used in conjunction with the
NB4N11M device data sheet, which contains full technical
details on the device specifications and operation.
Top View
© Semiconductor Components Industries, LLC, 2012
February, 2012 − Rev. 1
Figure 1. Top and Bottom View of the NB4N11M Evaluation Board
EVAL BOARD USER'S MANUAL
Board Lay−Up
The NB4N11M evaluation board is implemented in four
layers with split (dual) power supplies (Figure 7, Evaluation
Board Lay−up). For standard lab setup, a split (dual) power
supply is essential to enable the 50 W internal impedance in
the oscilloscope as a devices termination. The first layer or
primary trace layer is 0.005" thick Rogers RO4003 material,
which is designed to have equal electrical length on all signal
traces from the device under the test (DUT) to the sense
output. The second layer is the 1.0 oz copper ground plane.
The FR4 dielectric material is placed between second and
third layer and between third and fourth layer. The third
layer is also 1.0 oz copper ground plane. The fourth layer is
the secondary trace layer.
1
http://onsemi.com
Bottom View
Publication Order Number:
EVBUM2071/D

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Summary of Contents for ON Semiconductor NB4N11MDTEVB

  • Page 1 EVAL BOARD USER’S MANUAL Description Board Lay−Up ON Semiconductor has developed an evaluation board for The NB4N11M evaluation board is implemented in four the NB4N11M device as a convenience for the customers layers with split (dual) power supplies (Figure 7, Evaluation interested in performing their own device engineering Board Lay−up).
  • Page 2: Top Layer

    NB4N11MDTEVB SMA_GND SMA_GND TOP LAYER BOTTOM LAYER Figure 2. Top & Bottom Layers (Top View) Figure 3. Evaluation Board Lay−up Connecting Power and Ground Planes The side launch 9 pin power supply connector is wired as the PCB to accommodated easier connections. Exact values shown in Figure 4.
  • Page 3 Board Components Configuration the board. The NB4N11MDTEVB evaluation board requires six For the LVDS configuration Input pin pads of the D0 or side SMA connectors. Placement locations are described in D1 input has to be shorted using 100 W resistor across the Table 2 below.
  • Page 4 NB4N11MDTEVB Table 2. SMA Connector and Jumper Placement Device J1/Q0 J2/Q0 J3/Q1 J4/Q1 J6/D J7/D Pin # Connector Resistor 0402* 0402* 0402* 0402* 0402 0402 0402 0402 50 W (bottom) 50 W 50 W 50 W 50 W 0.01 mF 50 W 0.01 mF...
  • Page 5 NB4N11MDTEVB 10 mF 0.01 mF Z = 50 W Z = 50 W Z = 50 W NB4N11M Z = 50 W Z = 50 W 50 W 50 W Z = 50 W 10 mF 0.01 mF *50 W resistors must be added for 25 W load configuration Figure 8.
  • Page 6: Package Dimensions

    0.0196 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein.
  • Page 7 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: ON Semiconductor NB4N11MDTEVB...