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This user's guide contains support documentation for the DIYAMP-SOT23 evaluation module (EVM).
Included is a description of how to set up and configure the EVM, printed circuit board (PCB) layout,
schematic, and bill of materials (BOM) of the DIYAMP-SOT23-EVM.
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SBOU191 - July 2017
Submit Documentation Feedback
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Copyright © 2017, Texas Instruments Incorporated
DIYAMP-SOT23-EVM
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User's Guide
SBOU191 - July 2017
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Summary of Contents for Texas Instruments DIYAMP-SOT23-EVM
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Page 1: Table Of Contents
This user's guide contains support documentation for the DIYAMP-SOT23 evaluation module (EVM). Included is a description of how to set up and configure the EVM, printed circuit board (PCB) layout, schematic, and bill of materials (BOM) of the DIYAMP-SOT23-EVM. Contents ........................ - Page 2 ................Sallen-Key Filter Component Type Selection ......................Bill of Materials Trademarks FilterPro, TINA-TI are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
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Page 3: Introduction
Introduction The DIYAMP-SOT23-EVM is an EVM developed to give users the ability to easily evaluate their design concepts. This break-apart EVM has several popular op-amp configurations including: amplifiers, filters, and stability compensation configurations for both single and dual supply. The EVM is designed for 0805 and 0603 package size surface mount components enabling easy prototyping. -
Page 4: Hardware Setup
Hardware Setup www.ti.com Hardware Setup Assembly of the DIYAMP-SOT23-EVM involves identifying and breaking out the desired circuit configuration from the EVM, soldering components, header pins, and inputs and outputs connections. This section presents the details of these procedures. EVM Circuit Locations... -
Page 5: Detach Desired Circuit Configuration
Step 4. Use long-nose pliers to break header strips, provided in the EVM kit, into 4-position lengths. Figure 4. Terminal Strip (TS-132-G-AA) Broken Into 4-Pin Lengths SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 6: 4-Pin Length Terminal Strips Inserted In Dip Socket
Figure 6. Detached Board Configuration Position Over Terminal Pins Step 7. Attach SMA connectors, test points, or wires to the input and output of the separated PCB. Figure 7. Fully-Assembled Circuit Configuration From DIYAMP-SOT23-EVM DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright ©... -
Page 7: Schematic And Pcb Layout
The MFB topology (sometimes called infinite gain or Rauch) is often preferred, due to low sensitivity to component variations. The MFB topology creates an inverting second-order stage. This inversion may, or may not, be a concern in the filter application. SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 8: Single-Supply, Mfb Filter Top Layer
Figure 10. Single-Supply, MFB Filter Top Layer The PCB layout of the bottom layer of the single-supply, MFB filter configuration is displayed in Figure Figure 11. Single-Supply, MFB Filter Bottom Layer DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 9: Single-Supply, Sallen-Key Filter Schematic
The PCB layout of the top layer of the single-supply, Sallen-Key filter circuit configuration is displayed in Figure Figure 13. Single-Supply, Sallen-Key Filter Top Layer SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 10: Single-Supply, Sallen-Key Filter Bottom Layer
There are multiple ways to configure the single-supply, non-inverting amplifier. The following cases show three primary use case configurations for this circuit. DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... - Page 11 The op amp is typically configured as a unity-gain buffer. Step 1. Choose a value for the resistor installed in place of C4 Step 2. Compute R3 æ ö ´ ç ÷ è ø offset SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
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Page 12: Single-Supply, Non-Inverting Amplifier Top Layer
Figure 17. Single-Supply, Non-Inverting Amplifier Bottom Layer Single-Supply, Inverting Amplifier Figure 18 shows the schematic for the single-supply, inverting amplifier circuit configuration. Figure 18. Single-Supply, Inverting Amplifier Schematic DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 13: Single-Supply, Inverting Amplifier Top Layer
(14) The PCB layout of the top layer of the single-supply, inverting amplifier circuit configuration is displayed in Figure Figure 19. Single-Supply, Inverting Amplifier Top Layer SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 14: Single-Supply, Inverting Amplifier Bottom Layer
÷ ç ÷ ç ÷ (15) è ø è ø è ø è ø If R and R Equation 15 can be simplified to Equation (16) DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 15: Difference Amplifier Top Layer
Figure 22. Difference Amplifier Top Layer The PCB layout of the bottom layer of the difference amplifier circuit configuration is displayed in Figure Figure 23. Difference Amplifier Bottom Layer SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 16: Dual-Supply, Multiple Feedback Filter Schematic
The PCB layout of the top layer of the dual-supply, multiple feedback filter circuit configuration is displayed Figure Figure 25. Dual-Supply, Multiple Feedback Filter Top Layer DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 17: Dual-Supply, Multiple Feedback Bottom Layer
For this EVM, the Sallen-key filter can be configured for unity-gain by populating R1 with a short and leaving R2 open. Gain can be added by adding the appropriate resistors to R2 and R1 as explained in FilterPro. SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 18: Dual-Supply, Sallen-Key Top Layer
Figure 28. Dual-Supply, Sallen-Key Top Layer The PCB layout of the bottom layer of the dual-supply, Sallen-Key filter circuit configuration is displayed in Figure Figure 29. Dual-Supply, Sallen-Key Bottom Layer DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 19: Inverting Comparator Schematic
(20) è ø The PCB layout of the top layer of the inverting comparator circuit configuration is displayed in Figure Figure 31. Inverting Comparator Top Layer SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 20: Inverting Comparator Bottom Layer
The input signal must exceed the upper threshold (VH) to transition high or below the lower threshold (VL) to transition low. Equation 22 Equation 23 will calculate the value of R1 and R2 for the two desired thresholds. (22) (23) DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 21: Non-Inverting Comparator Top Layer
The dc gain of the R with dual-feedback circuit configuration can be calculated using Equation æ ö æ ö ç ÷ ç ÷ (24) è ø è ø SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 22: Example Of F Zero , Where A
This method generally results in a slower settling time than the R circuit as well. DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 23: Dual-Feedback Bottom Layer
Figure 39. R Dual-Feedback Bottom Layer 3.12 Dual-Supply, Non-Inverting Amplifier Figure 40 shows the schematic for the dual-supply, non-inverting amplifier circuit configuration. Figure 40. Dual-Supply, Non-Inverting Amplifier Schematic SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 24: Dual-Supply, Non-Inverting Amplifier Top Layer
Figure 41. Dual-Supply, Non-Inverting Amplifier Top Layer The PCB layout of the bottom layer of the dual-supply, non-inverting amplifier circuit configuration is displayed in Figure Figure 42. Dual-Supply, Non-Inverting Amplifier Bottom Layer DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 25: Dual-Supply, Inverting Amplifier Schematic
Figure (28) Capacitor C3 provides the option to filter the output. The cutoff frequency of the filter can be calculated using Equation p ´ ´ (29) SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 26: Dual-Supply, Inverting Amplifier Top Layer
Figure 44. Dual-Supply, Inverting Amplifier Top Layer The PCB layout of the bottom layer of the dual-supply, inverting amplifier circuit configuration is displayed Figure Figure 45. Dual-Supply, Inverting Amplifier Bottom Layer DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 27: Connections
SMA horizontal connectors attached to the input signal terminal. Figure 47. SMA Horizontal Connectors Figure 48 shows a wire attached to the input and output terminal. Figure 48. Wire Connections SBOU191 – July 2017 DIYAMP-SOT23-EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 28: Through-Hole Test Points
IN+ and IN- for the non-inverting and inverting inputs, respectively. The output connection is labeled VOUT. An example highlighting the input and output is shown in Figure Figure 50. Input and Output Pins in Terminal Area DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 29: Wire Alternative For Terminal Area
Figure 51. Wire Alternative for Terminal Area Enable and Disable Feature The DIYAMP-SOT23-EVM provides a means to test the shutdown feature for op-amp devices equipped with a shutdown pin. The access to the shutdown pin, labeled SD, is located on the terminal area. -
Page 30: Bill Of Materials And Reference
2. TI Precision Labs Training https://training.ti.com/ti-precision-labs-op-amps 3. Analysis of the Sallen-Key Architecture (SLOA024) 4. AC Coupled, Single-Supply, Inverting and Non-inverting Amplifier Reference Design (TIDU871) FilterPro Design Tool DIYAMP-SOT23-EVM SBOU191 – July 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... - Page 31 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
- Page 32 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
- Page 33 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes.
- Page 34 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated...
- Page 35 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...
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