Uart Application - Quectel M35 User Manual

The reference design for Debug Port is shown as below.

3.7.3. UART Application

The reference design of 3.3V level match is shown as below. If the host is a 3V system, please change
the 5.6K resistor to 10K.
Peripheral
Voltage level:3.3V
NOTE
It is highly recommended to add the resistor divider circuit on the UART signal lines when the host's level
is 3V or 3.3V. For the higher voltage level system, a level shifter IC could be used between the host and
the module. For more details about UART circuit design, please refer to document [8].
M35_User_Manual
Module
DBG_TXD
DBG_RXD
GND
Figure 21: Reference Design for Debug Port
1K
/TXD
1K
/RXD
1K
/RTS
1K
/CTS
1K
GPIO
1K
EINT
1K
GPIO
GND
Figure 22: Level Match Design for 3.3V System
Confidential / Released
Peripheral
TXD
RXD
GND
5.6K
5.6K 5.6K
GSM/GPRS Module Series
M35 User Manual
Module
RXD
TXD
RTS
CTS
DTR
RI
DCD
GND
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