Advanced Chipset Features - Advantech ARK-1382 User Manual

3.2.4

Advanced Chipset Features

Note! This "Advanced Chipset Features" screen controls the configuration of
the board's chipset; this page is developed to be chipset independent for
fine-tuning system performance. It is strongly recommended that only
technical users make changes to the default settings.
DRAM Timing Selectable
This item enables users to set optimal timings for items 2 through to 5. The sys-
tem default setting of "By SPD" ensures the system runs with stable and opti-
mal performance.
CAS Latency Time
This item enables users to set the timing delay in clock cycles before the
SDRAM starts a read command after receiving it.
DRAM RAS# to CAS# Delay
This item enables users to set the timing of the transition from RAS (Row
Address Strobe) to CAS (Column Address Strobe) as both rows and columns
are separately addressed shortly after DRAM is refreshed.
DRAM RAS# Precharge
This item enables users to set the DRAM RAS# precharge timing. System
default is set to "Auto" to reference the data from SPD ROM.
Prechage delay (tRAS)
This item allows user to adjust memory precharge time.
System Memory Frequency
This item allows user to adjust memory frequency to improvement perfor-
mance.
SLP_S4# Assertion Width
This item allows user to adjust SLP_S4# signal.This field indicates the mini-
mum assertion width of the SLP_S4# signal to ensure that the DRAMs have
been safely power-cycled.
System BIOS Cacheable
This item allows the system BIOS to be cached to allow faster execution and
better performance.
Video BIOS Cacheable
This item allows the video BIOS to be cached to allow faster execution and bet-
ter performance.
Memory Hole At 15 M-16 M
This item reserves 15 MB-16 MB memory address space to ISA expansion
cards that specifically require the setting. Memory from 15 MB-16 MB will be
unavailable to the system because only expansion cards can access memory in
this area.
PEG/Onboard VGA Control
This item allows the user to select whether onboard graphics processor or the
PCI Express card.
On-Chip Frame Buffer Size
This item allows the user to choose Frame Buffer Size. BIOS default value is
set to 8 MB.
[By SPD]
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
[1 to 2 sec.]
[Enabled]
[Disabled]
[Disabled]
[Auto]
[8 MB]
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