Test Patterns - JDS Uniphase CT-650 Reference Manual

Wideband test unit command-line reference guide
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Appendix C Test Patterns and Loop Codes

Test patterns

Test patterns
Table 12 Digital test patterns
Pattern
X
X
0000
X
X
X
X
1010
X
X
X
X
1111
X
1004HZ
X
X
X
1AND7
X
2^15-1
192
Table 12
provides a list of CT-650 test patterns along with a descrip-
tion of how they work. Unless otherwise indicated, these test patterns
are transmitted from left to right in a framed or unframed format.
Description
Fixed all zeros (0) pattern. Used to stress circuits for B8ZS clear
channel capability (CCC). The pattern can be transmitted framed
or unframed, and should always be transmitted with B8ZS
encoding selected.
DS3 Rate — In the M13 and C-Bit modes, this is an alternating
ones (marks) and zeros (spaces) pattern which equates to send-
ing the DS3 Blue Signal. In the Unframed mode, this is an
unframed alternating ones (marks) and zeros (spaces) pattern.
DS1/FT1 Rate — Fixed alternating marks (1) and spaces (0) test
pattern. Used to perform a minimum level stress test on clock
recovery circuits.
Fixed all ones (1) pattern. Used to stress span repeater current
regulator circuits. It can be used as an Alarm Indication Signal
(AIS) in unframed circuits, a keep alive signal, idle code, or red
alarm in other circuits. Use pattern to measure signal power level
in dBdsx (see SIGNAL category test results).
1004 Hz tone which is transmitted over the selected DS1 chan-
nel. With T1 D4 framing, the tone is phase shifted between adja-
cent DS0 channels to prevent Yellow Alarms
DS3 Rate — Fixed F01000000... test pattern. Used to stress the
12.5% ones density requirement for FT1 circuits. Pattern aligned
with F-bits to prevent false Yellow Alarms.
DS1 Rate — Fixed test pattern of F01000000.... The pattern is
aligned with the D4 or ESF F-bits as indicated to prevent false
Yellow Alarms. This pattern is also identified as the 1:7 pattern.
FT1 Rate — Fixed F01000000... test pattern. Used to stress the
12.5% ones density requirement for T1 circuits. Pattern aligned
with F-bits to prevent false Yellow Alarms.
32,767-bit pseudorandom pattern which generates a maximum
of 14 sequential zeros and 15 sequential ones. This pattern con-
forms to CCITT Recommendation O.151
CT-650 Command-Line Reference Guide
Release 9.4

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