Commodore Amiga A1000 Hardware Reference Manual page 282

DSKDAT 026
DSKDATR 008
DSKLEN 024
DSKPTH 020
DSKPTL 022
DSKSYNC 07E
W P Disk DMA data write
ER P Disk DMA data read (early read dummy
This register is the disk DMA data buffer. It
contains two bytes of data that are either sent
(written) to or received (read) from the disk.
The write mode is enabled by bit 14 of the LENGTH
register. The DMA controller automatically
transfer data to or from this register and RAM,
and when the DMA data is finished (length=0) it
causes a disk block interrupt. See interrupts below.
W P Disk length
This register contains the length (number of words)
of disk DMA data. It also contains two control
bits, a DMA enable bit, and a DMA
direction (read/write) bit.
BIT# FUNCTION
-------------------------------------------------
15 DMAEN
14 WRITE
13-0 LENGTH
W A Disk pointer (high 3 bits)
W A Disk pointer (low 15 bits)
This pair of registers contains the 18-bit
address of disk DMA data. These address registers
must be initialized by the processor or Copper
before disk DMA is enabled.
W P Disk sync register
hold the match code for disk read synchronization.
See ADKCON bit 10.
- Appendix A 273 -
address )
DESRIPTION
Disk DMA enable
Disk write (RAM to disk) if 1
Length (# of words) of DMA data.