Local Variable Promotion - Intel i960 User Manual

Optimization

Local Variable Promotion

The compiler promotes a local variable to a register location when the
variable's address is not taken and its storage class is
Local variables stay in their register location through the life of the
function. Optimization level
assigns all variables with
Register Management
The register allocator phase of the compiler assigns all register operands to
the physical registers. For the KB/SB processors, the physical registers
available for assignment include the four floating-point registers. For all
i960 processors, the physical general-purpose registers available for
assignment include
r3
specify the compiler option for position-independent data (gcc960's
or option or ic960's
mpid-safe
unavailable for assignment. Due to the standard calling conventions,
is not available for register-operand assignment.
Register Spilling
Portions of the compiler that run before register allocation can produce
code that needs more physical registers than are available in the processor.
The register allocator must fit each function's arbitrarily large burden of
register demands into the physical registers implemented in the hardware.
To allocate available registers, the compiler must reuse each physical
register many times.
When the physical registers cannot meet the demands of a particular
function, the register allocator must insert a sequence of instructions,
known as spill code, to transfer long-lived values from some of the
registers in order to free the registers for more immediate demands.
suppresses local variable promotion and
0
storage class to stack locations.
auto
through , through
r15 g0
or option) to make
Gpd Gpr
or
auto register
, and . You must
g11 g13
mpid
g12
g14
11
.
11-17