Yamaha SB168-ES Service Manual page 24

SB168-ES
S1L51252F32S200 (X3775A0R) PLLP2 (Gate Array)
PIN
NAME I/O
NO.
1 (NC) -
2 (NC) -
3 PB8 O
4 PB9 O
5 VDD -
6 VSS -
7 PA0 O
8 NCSIN6 I
9 NCSIN5 I
10 NRD I
11 NWRH I
12 NWRL I
13 PA1 O
14 ADH1 I
15 ADH2 I
16 ADH3 I
17 ADH4 I
18 ADH5 I
19 PA2 O
20 VSS -
21 VDD -
22 VDD -
23 VSS -
24 ADL1 I
25 ADL2 I
26 ADL3 I
27 ADL4 I
28 ADL5 I
29 ADL6 I
30 ADL7 I
31 ADL8 I
32 VSS -
33 VDD -
34 VDD -
35 VSS -
36 DT0 I/O
37 DT1 I/O
38 DT2 I/O
39 DT3 I/O
40 DT4 I/O
41 DT5 I/O
42 VDD -
43 VSS -
44 DT6 I/O
45 DT7 I/O
46 DT8 I/O
47 DT9 I/O
48 VDD -
49 VSS -
50 (NC) -
51 (NC) -
52 (NC) -
53 DT10 I/O
54 DT11 I/O
55 DT12 I/O
56 DT13 I/O
57 DT14 I/O
58 DT15 I/O
59 VSS -
60 PA3 O
61 NTCWAIT O
62 NCSIO3V O
63 NCSIO5V O
64 NCSJK1 O
65 NCSCONT O
66 VDD -
67 NCSSLOT1 O
68 NCSSLOT2 O
69 NCSSIO4 O
70 NCSREC2 O
71 NCSMTLED O
72 VDD -
73 NCSUSB O
74 NCSSMPTE O
75 NCSUART O
76 VSS -
77 VDD -
78 NRES I
79 CPUCLK I
80 (NC) -
81 VSS -
82 VSS -
83 NCSATSC1 O
84 VDD -
85 NCSATSC2 O
86 PA4 O
87 PA5 O
88 PA6 O
89 NCTSYNCO O
90 NCTSYNCI I
91 VDD -
92 NCSDSP71 O
93 NCSDSP72 O
94 NCSDSP73 O
95 NCSDSP74 O
96 NCSDSP75 O
97 NCSDSP76 O
98 VDD -
99 PA7 O
100 PA8 O
101 NCSDSP61 O
102 NCSDSP62 O
103 NCSDSP63 O
104 NCSDSP64 O
24
FUNCTION
(Connected to VSS on P.C.B.)
(Pulled up on P.C.B.)
Output port B8
Output port B9
IO power supply (3.3V)
Ground
Output port A0
CPU chip select 6
CPU chip select 5
CPU read enable
CPU write enable H
CPU write enable L
Output port A1
CPU address bus 11
CPU address bus 12
CPU address bus 13
CPU address bus 14
CPU address bus 15
Output port A2
Ground
Internal power supply (2.5V)
IO power supply (3.3V)
Ground
CPU address bus 1
CPU address bus 2
CPU address bus 3
CPU address bus 4
CPU address bus 5
CPU address bus 6
CPU address bus 7
CPU address bus 8
Ground
Internal power supply (2.5V)
IO power supply (3.3V)
Ground
CPU data bus 0
CPU data bus 1
CPU data bus 2
CPU data bus 3
CPU data bus 4
CPU data bus 5
IO power supply (3.3V)
Ground
CPU data bus 6
CPU data bus 7
CPU data bus 8
CPU data bus 9
Internal power supply (2.5V)
Ground
(Connected to VDD on P.C.B.)
(Connected to VDD on P.C.B.)
(Pulled up on P.C.B.)
CPU data bus 10
CPU data bus 11
CPU data bus 12
CPU data bus 13
CPU data bus 14
CPU data bus 15
Ground
Output port A3
CPU wait signal
Chip select (103V)
Chip select (105V)
Chip select (JK1)
Chip select (CONT)
Power supply
Chip select (SLOT1)
Chip select (SLOT2)
Chip select (S104)
Chip select (REC2)
Chip select (MTLED)
Power supply
Chip select (USB)
Chip select (SMPTE)
Chip select (UART)
Ground
Power supply
System reset
CPU clock
(Connected to VSS on P.C.B.)
Ground
Ground
Chip select (ATSC1)
Power supply
Chip select (ATSC2)
Output port A4
Output port A5
Output port A6
Internal counter synchronous signal output
Internal counter synchronous signal input
Power supply
Chip select (DSP7_1)
Chip select (DSP7_2)
Chip select (DSP7_3)
Chip select (DSP7_4)
Chip select (DSP7_5)
Chip select (DSP7_6)
Power supply
Output port A7
Output port A8
Chip select (DSP6_1)
Chip select (DSP6_2)
Chip select (DSP6_3)
Chip select (DSP6_4)
PIN
NAME I/O
NO.
105 (NC) - (Pulled up on P.C.B.)
106 VDD - Power supply
107 (NC) - (Connected to VSS on P.C.B.)
108 (NC) - (Connected to VSS on P.C.B.)
109 VSS - Ground
110 VDD - Power supply
111 NCSDSP7 O Chip select (DSP7_ALL)
112 NCSDSP6 O Chip select (DSP6_ALL)
113 PA9 O Output port A9
114 MCK256O O 256FS synchronous clock output
115 MCK256MI I 256FS synchronous clock input (Master)
116 MCK256SI I 256FS synchronous clock input (Slave)
117 VSS - Ground
118 VDD - Power supply
119 ICK45 I For internal clock 88.2k, 44.1k
120 ICK49 I For internal clock 96k, 48k
121 DIR2XI O Clock for X1 of DIR2
122 PA10 O Output port A10
123 VSS - Ground
124 VDD - Power supply
125 EXTWC1 I External word clock input 1
126 EXTWC2 I External word clock input 2
127 EXTWC3 I External word clock input 3
128 EXTWC4 I External word clock input 4
129 VSS - Ground
130 VDD - Power supply
131 EXTWC2561 I External WC (256FS) input 1
132 EXTWC2562 I External WC (256FS) input 2
133 PA11 O Output port A11
134 DIRMCA I MCA input of DIR2
135 DIRMCB I MCB input of DIR2
136 DIRWC I WC input of DIR2
137 VSS - Ground
138 VDD - Power supply
139 DIRMCC I MCC input of DIR2
140 DIRSYNC I SYNC input of DIR2
141 EXTWCSEL O EXTWC clock select output
142 DIRWCSEL O DIRWC clock select output
143 PA12 O Output port A12
144 PLLOUT I PLL VCO OUT input
145 VSS - Ground
146 VDD - Power supply
147 PCPOUT O EXT WC SEL to MWC comparison circuit output
148 PA13 O Output port A13
149 M256FS O Master clock (256FS)
150 M128FS O System clock (128FS)
151 VSS - Ground
152 VDD - Power supply
153 (NC) - (Connected to VDD on P.C.B.)
154 (NC) - (Connected to VSS on P.C.B.)
155 (NC) - (Pulled up on P.C.B.)
156 (NC) - (Pulled up on P.C.B.)
157 M64FS O System clock (64FS)
158 MWC O Word clock
159 MSYNC O Synchronous signal
160 PA14 O Output port A14
161 WCO_BNC O WC output for BNC connector
162 PA15 O Output port A15
163 FS256_SLOT1 O Clock (256FS) for MY SLOT1
164 FS256_SLOT2 O Clock (256FS) for MY SLOT2
165 VDD - Power supply
166 SYNC_SLOT1 O Synchronous signal for MY SLOT1
167 SYNC_SLOT2 O Synchronous signal for MY SLOT2
168 PB0 O Output port 80
169 SLOT_12M O Clock (12MHz) for MY SLOT
170 SLOT_6M O Clock (6MHz) for MY SLOT
171 VSS - Ground
172 SLOT_3M O Clock (3MHz) for MY SLOT
173 PB1 O Output port B1
174 SLOT_48K O Word clock (48/44) for MY SLOT
175 SLOT_48S O Synchronous signal (48/44) for MY SLOT
176 PB2 O Output port B2
177 ANA256FS O Clock for analog circuit
178 VDD - Power supply
179 NLOCK I PLL lock detect signal
180 NDIRLOCK I DIR2 PLL lock signal
181 VSS - Ground
182 SCANEN I Scan test input
183 ATPGEN I ATPG test input
184 TSTEN I Test mode selection
185 VDD - Power supply
186 TRRERR1 I 2TR DIN UNLOCK input
187 TRRERR2 I 2TR DIN UNLOCK input
188 VSS - Ground
189 PB3 O Output port B3
190 NMLOCKSEL O Lock select output
191 NLOCKRTN I Lock delay input
192 PB4 O Output port B4
193 MUTEIN I Mute input
194 VDD - Power supply
195 MUTEOUT1 O Mute output 1
196 MUTEOUT2 O Mute output 2
197 MUTEOUT3 O Mute output 3
198 MUTEOUT4 O Mute output 4
199 MUTEOUT5 O Mute output 5
200 NMUTEOUT6 O Mute output 6
201 VDD - Power supply
202 PB5 O Output port B5
203 DOUBLE O Register setting value output
204 K48K96 O Register setting value output
205 PB6 O Output port B6
206 SLOT1_16CH O SLOT1 16/8 ch selection
207 SLOT2_16CH O SLOT2 16/8 ch selection
208 PB7 O Output port B7
DM: IC202
FUNCTION