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This document outlines the basic steps and functions that are required to ensure the proper operation of
the ADS42JBx9 System Evaluation Kit (SEK). The kit includes an ADS42JBx9EVM, a JESD204B
Translation Card, two 5-VDC power supplies, and a mini-USB cable. This kit is designed for use with the
Texas Instruments (TI) TSW1400 High Speed Data Capture/Pattern Generator Card (not included)
running with the High Speed Data Converter Pro GUI software. The ADS42JBx9EVM contains either an
ADS42JB49 (14-bit) or ADS42JB69 (16-bit) dual-channel, 250-MSPS, analog-to-digital converter. The
EVM also contains a TI LMK04828 clock jitter cleaner. The TI JESD204B Translation card receives
JESD204B standard output data from the ADC EVM and translates it to parallel LVDS data that can be
captured by the TSW1400 for analysis. This guide helps users to quickly evaluate the performance of the
ADS42JBx9EVM boards by capturing and displaying waveforms using the TSW1400. The EVM
schematics, BOMs, and layout files are found in the design package under the ADS42JBx9SEK product
folder on www.ti.com.
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SLAU468A - November 2012
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ADS42JBx9 System Evaluation Kit
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Copyright © 2012, Texas Instruments Incorporated
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Table of Contents
Related Manuals for Texas Instruments ADS42JBx9
Summary of Contents for Texas Instruments ADS42JBx9
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Page 1: Table Of Contents
This document outlines the basic steps and functions that are required to ensure the proper operation of the ADS42JBx9 System Evaluation Kit (SEK). The kit includes an ADS42JBx9EVM, a JESD204B Translation Card, two 5-VDC power supplies, and a mini-USB cable. This kit is designed for use with the Texas Instruments (TI) TSW1400 High Speed Data Capture/Pattern Generator Card (not included) running with the High Speed Data Converter Pro GUI software. -
Page 2: Introduction
The High Speed Data Converter Pro software GUI processes the data from the TSW1400EVM to quickly assess the performance of the ADS42JBx9. The FMC output interface connector of the ADS42JBx9EVM has also been verified to be compatible with the Xilinx KC705 evaluation platform. -
Page 3: Software Control
1. Download the software from the ADS42JBx9EVM resource page: http://www.ti.com/ww/en/analog/dataconverters/jesd204b/resources.shtml. There are links here to the ADS42JBx9 EVM and SEK. 2. Extract the files from the zip file named ADS42JBx9 GUI vXpY installer.zip where XpY represents the version number. 3. Run setup.exe and follow the installation prompts. -
Page 4: Software Operation
SEND, READ, SAVE, and LOAD buttons. The SEND and READ buttons write or read all of the registers of the ADS42JBx9 and LMK04828. The SAVE and LOAD buttons can be used to save or load a text file of the registers. The flashing RESET button can be clicked to reset the USB port connection. This same button reads CONNECTED when the GUI is successfully connected to the EVM. -
Page 5: Top-Level Block Diagram Window Of The Ads42Jbx9 Gui
Software Control www.ti.com Figure 2. Top-Level Block Diagram Windor47.4 30436 7.e. 0 Td(Ton49en4 10 .e. 0(Blor47.4 3of0 Td... -
Page 6: Adc Controls Window Of The Ads42Jbx9 Gui
Software Control www.ti.com 2.2.2... -
Page 7: Digital Block Controls Window Of The Ads42Jbx9 Gui
Clicking either Digital Block block brings up the Digital Block Controls window, shown in Figure Descriptions for the various controls are given in Table Figure 4. Digital Block Controls Window of the ADS42JBx9 GUI Table 3. Digital Block Controls Window Descriptions Control Description... -
Page 8: Jesd204B Controls Window Of The Ads42Jbx9 Gui
Clicking on either JESD204B Digital block opens the JESD204B Controls window, shown in Figure 5. Use the ADS42JBx9 data sheet for reference to assist with the descriptions of these various controls. Figure 5. JESD204B Controls Window of the ADS42JBx9 GUI ADS42JBx9 System Evaluation Kit SLAU468A –... -
Page 9: Lmk04828 Outputs Control Window Of The Ads42Jbx9 Gui
6. The top panel displays a block diagram of the LMK04828. Clicking on a blue colored option opens a new panel in the lower section of the GUI for control of that section. Figure 6. LMK04828 Outputs Control Window of the ADS42JBx9 GUI 2.2.5.1 Divider, Digital Delay, Analog Delay Controls The default lower panel is for output control. -
Page 10: Lmk04828 Input Clock Settings
Software Control www.ti.com... -
Page 11: Lmk04828 Pll1 Controls
LED D1 (LMK Locked) on the ADS42JBx9EVM illuminates. Some reasons for this not illuminating are using the wrong divider values or the reference oscillator tolerance (ppm) is too large. Figure 8. LMK04828 PLL1 Controls SLAU468A – November 2012 ADS42JBx9 System Evaluation Kit Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 12: Lmk04828 Pll2 Controls
Clicking Internal VCO in the block diagram allows selection of either internal VCO0 or VCO1. 2.2.5.6 OSCout Controls Clicking OSCout in the block diagram provides control of the OSC output (currently not used on the EVM). ADS42JBx9 System Evaluation Kit SLAU468A – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 13: Lmk04828 Sysref Settings
SYSREF output global settings of the LMK04828. The settings made in this panel apply to all SYSREF outputs. Figure 10. LMK04828 SYSREF Settings SLAU468A – November 2012 ADS42JBx9 System Evaluation Kit Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 14: Jesd204B Translation Card
SW8 (MSEL) Sets programming mode of FPGA. Default is 1, 2, 3, 5 off and 4 SW10 (UCD Reset) Power monitor U12 reset ADS42JBx9 System Evaluation Kit SLAU468A – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 15: Basic Test Setup
Note that there are filters on the analog source, which is necessary to achieve the best performance. The performance can be increased using external clock mode as this allows for the use of a filter on the clock source. SLAU468A – November 2012 ADS42JBx9 System Evaluation Kit Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 16: Test Setup
Basic Test Setup www.ti.com Figure 11. Test Setup ADS42JBx9 System Evaluation Kit SLAU468A – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 17: Tsw1400Evm Setup
Basic Test Setup www.ti.com TSW1400EVM Setup See the TSW1400EVM User's Guide (SLWU079) for a more detailed explanation of the TSW1400 setup and its features. This document assumes that the HSDCPro software and the TSW1400 pattern capture and generation board are both installed and functioning properlrn c apture SL.19.6d(board)Tj28.57 0 Td(are)Tj17.4548.7BT/F2.o.42 688.9 l0.5 w0 0 1 11 j28.5 RG81 0 Td(ON)Tj 1board o.42 688.9 l0.5 w0 0 1 11 j28.5 RG90 0 0 rON )Tj19.68 0 Td(the)Tj16.9 0 Td(TSWLEDproperlr51.36 0 labed(captu5.14 0 Td(“captu rg54 70FPGA_DONEWU0791j1 0 Td(”WU079 rg54 70... - Page 18 13. If the JESD204B link does not get established, make sure the SYSREF MUX panel on the ADS42JBx9 GUI is set to SYSREF CONTINUOUS. If this is set to any other value, the SYSREF outputs will be disabled from the LMK04828, thus possibly preventing synchronization from occurring.
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Page 19: High Speed Data Converter Pro (Hsdcpro) Sample Capture
ADCs → High Speed Data Converter Pro. 2. When prompted for the serial number of the board, select the serial number that represents the TSW1400 that has been connected to the ADS42JBx9. This number is on a sticker on the TSW1400 board. - Page 20 Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization.
- Page 21 FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
- Page 22 Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp...
- Page 23 EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use. It is intended solely for use for preliminary feasibility evaluation in laboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems and subsystems.
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Page 24: Important Notice
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
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