Motorola ASTRO Digital XTL 5000 Detailed Service Manual page 93

Theory of Operation: Transmitter 3-27
First Stage
The RFPA first stage provides gain that is determined by the control voltage, RFPA_CNTRL. This
control voltage is generated in the power control section and is a function of the final-stage output
power, temperature, and current, as well as the control and A+ voltage levels. See "3.6.1.4. Power
Control (for 50W and 100W Transmitter)" on page 3-30 for a detailed explanation of the power
control section.
The 2 mW TX_INJ signal is routed to the U3550 first-stage device (Pin 16, RFIN) via C3500 to an
integrated, wide-band input match. U3550 is a two-stage LDMOS device with a bandpass interstage
match consisting of C3503, L3502, C3504, R3501 and C3505 routed between VD1 (pin 14) and G2
(pin 11). L3501 and L3503 provide the K9.1V drain bias voltage for the first and second stages to
VD1 (pin 14) and RFOUT1/2 (pins 6 and 7), respectively. The RFPA_CNTRL gate bias is provided to
both stages internally via VCNTRL (pin 1). Both U3550 stages are operated Class A.
Driver Stage
C3521, L3520, C3520, and a transmission line form a low-pass, interstage match that transfers
power to the Q3530 LDMOS transistor. R3520-3 provide device stability, and R3524 and C3522
supply the VGBIAS2 gate bias. L3530-1, R3530-1, C3530, C3531, C3536 and C3537 form the A+
drain bias circuit. Q3530 is operated Class AB.
Final Stage
C3532-4, and transmission lines form a bandpass. R3532-8 provide stability for Q3550. R3540 and
C3535 supply the VGBIAS1 gate bias to Q3550. L3549-51, C3548-51, and R3551 form the A+ drain
bias circuit.
C3552-9 and transmission lines form a low-pass. Q3550 operate Class AB.
R3550, R3560, C3563, and U3561 comprise the final-stage, current-sense circuit that generates the
VCURRENT voltage proportional to the final stage current. R3560 sets the circuit gain. U3560
generates the VTEMP voltage, which is proportional to the final-stage temperature.
6881096C74-B May 25, 2005