Superfilter; Modulation; Charge Pump Bias; Loop Filter - Motorola ASTRO Digital XTL 5000 Detailed Service Manual

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3.7.3.4 Superfilter

The superfilter is an active filter that provides a low-noise supply for the VCOs, receiver and
transmitter injection amplifiers. Regulator U0950, located in the controller section, supplies 9.3 Vdc
to the FGU section thru the filtering network consisting of L5750, C5751, C5753, and C5755. This
voltage is applied to pin 30 (SFIN) of U5752 and the emitter of Q5752. The output is a superfiltered
8.2 Vdc at the junction of pin 28 (SFOUT) of U5752 and the collector of Q5752. Filtering is
accomplished with capacitors C5766, C5769, and C5772 at the output of this circuit and C5770 at
pin 26 of U5752.

3.7.3.5 Modulation

To support many voice, data, and signaling protocols, XTL 5000 radios must modulate the
transmitter carrier frequency over a wide audio-frequency range, from less than 10 Hz up to more
than 6 kHz. The LV Frac-N IC supports audio frequencies down to zero Hz by using dual-port
modulation. The audio signal at pin 10 (MODIN) is internally divided into high- and low-frequency
components, which modulate both the synthesizer dividers and the external VCOs through signal
MODOUT (pin 41). The IC is adjusted to achieve flat modulation frequency response during
transmitter modulation balance calibration using a built-in modulation attenuator.
The Digital-to-Analog Converter (DAC) IC (U0900), and switched-capacitor filter (SCF) IC (FL0900)
form the interface between the radio's DSP and the analog input of the LV Frac-N IC.

3.7.3.6 Charge Pump Bias

External circuitry connected to pin 39 (Bias 2) and pin 40 (Bias 1) of U5752 determine the current
that is applied to the charge-pump circuitry. During receive mode, resistors R5754, R5759, and
R5765 set the current supplied to pin 40 (Bias 1). Transistor Q5750 and resistors R5752, R5753,
and capacitor C5759 form a circuit that momentarily increases the current to pin 40 (Bias 1) during
receiver programming of U5752. This circuit is activated by pin 46 (ADAPTSW) of U5752 during the
transition of programming U5752 to frequency and effectively decreases the length of time for the
synthesizer to lock on frequency. Similarly, during transmitter mode, resistors R5764, R5759, and
R5753 set the current supplied to pin 39 (Bias 2). Transistor Q5752 and resistors R5767, R5764,
and capacitor C5762 form a circuit that momentarily increases the current to pin 39 (Bias 2) during
transmitter programming of U5752.

3.7.3.7 Loop Filter

The loop filter operates in synchronization with the phase detector of U5752 in two modes, normal
and adapt. In normal mode, the loop filter forms a third-order loop filter consisting of components
R5772, R5774, R5775, C5781 to C5787, C5790 to C5792, and C5809 to C5812.
Pin 43 (IOUT) of U5752 provides the charge-pump current for steering of the control voltage line to
the VCOs. During normal mode, pin 45 (IADAPT) is set to a high impedance and has no effect on the
loop filter. When U5752 is programmed to a new frequency, the IC is initially operated in adapt mode.
In this mode the loop filter is reconfigured for a wider bandwidth allowing the synthesizer to lock
faster. The charge-pump output is supplied through pin 45 (IADAPT) in this mode, and this
reconfigures the loop filter to behave like a second-order filter.
3.7.3.8 Lock Detect
Lock status of the synthesizer loop is provided to the microprocessor by pin 4 (LOCK) of U5752. A
high level (3.0 Vdc) indicates that the loop is stable. A low voltage indicates that the loop is not
locked and will result in a Fail 001 to be displayed on the control head display.
May 25, 2005
Theory of Operation: Frequency Generation Unit (FGU)
6881096C74-B