Daughtercard Module; Figure 3-44. Xtl 5000 Daughtercard Module - Motorola ASTRO Digital XTL 5000 Detailed Service Manual

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In receive mode, the ABACUS III IC provides data samples directly to the DSP for processing. In
transmit mode, the DAC provides a serial D/A converter. The data generated by the DSP is filtered
and reconstructed as an analog signal to present a modulation signal to the VCO (voltage-controlled
oscillator) at the LV Frac-N synthesizer. Both the transmit and receive digital data paths between the
DSP and the CODEC are through the Patriot IC BBP (Baseband Interface Port) SSI port.
The CODEC provides A/D conversion of the analog microphone signal and D/A conversion of the
analog speaker output. During transmit, the microphone audio is passed through the gain/filtering
analog circuitry to the CODEC, which translates the analog waveform to serial SSI data. This data is
made available to the DSP through the Serial Audio Port (SAP) of the Patriot IC. Conversely, the
DSP writes speaker data samples to the D/A in the CODEC through the SAP port. The CODEC
provides an analog speaker output audio signal to the audio power amplifier, U0204.
3.8.1

Daughtercard Module

The daughtercard module
module interfaces with other parts of the main board. This module primarily contains three sections:
• Microprocessor (Patriot IC: U100): consists of a controller and a DSP whose functions are
described above in
• FLASH IC (U102): the firmware storage IC
• SRAM IC (U103): used by the microprocessor to perform its memory operations
NOTE: The three sections of the daughtercard module are highly susceptible to ESD and moisture
damage. Extreme care is advised when handling or servicing the main board.
From ABACUS
To DAC
To Codec SAP Digital Audio
To ABACUS, LV-FRAC-N,
DAC, ADC, Volume POT
GPIO
May 25, 2005
(Figure 3-44) contains the central processing unit (CPU) of the radio. This
"3.8. Controller Section"
PATRIOT
BBP RX
56600 DSP
BBP TX
DSP RAM
SPI
MCORE
EIM
UART's
SB9600
(UART B)

Figure 3-44. XTL 5000 Daughtercard Module

Theory of Operation: Controller Section
on page 3-62.
VDD_CORE
VDD_EIM
VDD_I/O
16.8MHz, 1.5V p-p sinewave
CKIH
CKIL
16-bit
I/O,
USB/RS232
(UART A)
32kHz, 2.85V p-p sinewave
8MB
FLASH
1M
SRAM
MAEPF-27819-O
6881096C74-B
1.5V
1.8V
3.0V