Figure 3-34. Power Control Components (700-800 Mhz) - Motorola ASTRO Digital XTL 5000 Detailed Service Manual

3-44
VFORWARD
(FROM ON)
TEMP_1
(U0959, PIN 9)
VTEMP
(FROM RFPA)
TEMP_2
(U0959, PIN 10)
Q0955
Power Control Loop
VFORWARD from the ON is buffered via the non-inverting, variable-gain stage U0956-2 whose gain
is set by EPOT U0952. The proper gain is determined during power-detection calibration tuning.
Buffered VFORWARD (U0956-2, Pin 7) is added to PWR_SET via R0971 and R0972 and then
compared to a reference determined by R0974 and R0975. PWR_SET is supplied by the digital-to-
analog converter (DAC) U0959, Pin 2. Comparator stage U0956-3 increases or decreases
RFPA_CNTRL so that the voltage at U0956-3, Pin 9 in the same at the reference voltage at U0956-
3, Pin 10. When the PWR_SET voltage is decreased, U0956-3 increases RFPA_CNTRL to increase
VFORWARD which is proportional to forward power thus increasing the power level. When the
PWR_SET voltage is increased, U0956-3 decreases RFPA_CNTRL to decrease VFORWARD, thus
decreasing the power level. The microprocessor initiates the loop through U0958-1 and Q0954.
Loop timing is set via software together with R0977 and C0973.
May 25, 2005
EEPOT
U0952
9.3V
-
U0956-2
+
PWR_SET
(U0959, PIN 2)
9.3V
-
U0957-1
+
9.3V
-
U0957-2
+
Figure 3-34. Power Control Components (700–800 MHz)
9.3V
U0957-4
D0950
9.3V
-
U0956-3
+
D0951
+
1.5V
-
PA_EN
9.3V
-
D0952
U0957-4
+
Theory of Operation: Transmitter
9.3V
-
+
RFPA_CNTRL
(TO RFPA)
Q0954
CURR_LIM_SET
(U0959, PIN1)
VCURRENT
(FROM RFPA)
MAEPF-27889-O
6881096C74-B