Block Diagram - Casio QT-7300 Service Manual

5-2. Block diagram

(1) QT-7300 System Diagram
<To Inverter>
<To TSCC>
+5V Power Supply
GND
(2) QT-7300 system block diagram
VGA
C&T69030
+5V
GND
+12V
5V/12V/GND
VR
LCD
convert
board
<Relay Board>
100 W
CPU
<To CDCC>
AGP Bus
(66 MHz)
Ethernet
RTL8139C
IDE1
EISA
Ultra DMA.33
Slot
IDE2
Super I/O 1
W83977TF-AW
KCB COM1
FDD COM2
IR LPT1
— 37 —
Inverter
<LCD & Touch Screen>
CN1 CN2
LCD Cable
To COM1B
EMI Filter
PISA
FDD USB PS/2 K/B
FDD/KB/MOUSE
Celeron Procesor
Host Bus (66/100 MHz)
(66/100 MHz)
North Bridge
82443BX
ISA Bus (33 MHz)
USB1 USB2
South Bridge
82371EB
(PIIX4)
RTC DS12B887
ISA Bus (8.33 MHz)
Super I/O 2
W83877TF
COM3
COM4
RS232/422/485
CN2
Drawer 1
Drawer 2
CDCC
Multi I/O
North Bridge
82443BX
BIOS
H/W M
DOC
WDT
PC/104