Texas Instruments TLC5510 Manual

Texas Instruments TLC5510 Manual

8-bit high-speed analog-to-digital converters
Hide thumbs Also See for TLC5510:

Advertisement

Quick Links

features
Analog Input Range
– TLC5510 . . . 2 V Full Scale
– TLC5510A . . . 4 V Full Scale
8-Bit Resolution
Integral Linearity Error
± 0.75 LSB Max (25°C)
± 1 LSB Max (– 20°C to 75°C)
Differential Linearity Error
± 0.5 LSB Max (25°C)
± 0.75 LSB Max (– 20°C to 75°C)
Maximum Conversion Rate
20 Mega-Samples per Second
(MSPS) Max
description
The TLC5510 and TLC5510A are CMOS, 8-bit, 20
MSPS analog-to-digital converters (ADCs) that
utilize a semiflash architecture. The TLC5510 and
TLC5510A operate with a single 5-V supply and
typically consume only 130 mW of power.
Included is an internal sample-and-hold circuit,
parallel outputs with high-impedance mode, and
internal reference resistors.
The semiflash architecture reduces power
consumption and die size compared to flash
converters. By implementing the conversion in a
2-step process, the number of comparators is
significantly reduced. The latency of the data
output valid is 2.5 clocks.
The TLC5510 uses the three internal reference
resistors to create a standard, 2-V, full-scale
conversion range using V
need for external reference resistors. The TLC5510A uses only the center internal resistor section with an
externally applied 4-V reference such that a 4-V input signal can be used. Differential linearity is 0.5 LSB at 25°C
and a maximum of 0.75 LSB over the full operating temperature range. Typical dynamic specifications include
a differential gain of 1% and differential phase of 0.7 degrees.
The TLC5510 and TLC5510A are characterized for operation from –20°C to 75°C.
T A
– 20°C to 75°C
20°C to 75°C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS
. Only external jumpers are required to implement this option and eliminates the
DDA
AVAILABLE OPTIONS
PACKAGE
TSSOP (PW)
(TAPE AND REEL ONLY)
TLC5510IPW
TLC5510INSLE
TLC5510AINSLE
POST OFFICE BOX 655303
SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003
5-V Single-Supply Operation
Low Power Consumption
TLC5510 . . . 127.5 mW Typ
TLC5510A . . . 150 mW Typ
(includes reference resistor dissipation)
TLC5510 is Interchangeable With Sony
CXD1175
applications
Digital TV
Medical Imaging
Video Conferencing
High-Speed Data Conversion
QAM Demodulators
PW OR NS PACKAGE †
(TOP VIEW)
OE
1
DGND
2
D1(LSB)
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D8(MSB)
10
V
11
DDD
CLK
12
† Available in tape and reel only and ordered
as the shown in the Available Options table
below.
MAXIMUM FULL SCALE
MAXIMUM FULL-SCALE
SOP (NS)
INPUT VOLTAGE
Copyright  1994 – 2003, Texas Instruments Incorporated
DALLAS, TEXAS 75265
TLC5510, TLC5510A
DGND
24
REFB
23
REFBS
22
AGND
21
AGND
20
ANALOG IN
19
V
18
DDA
REFT
17
REFTS
16
V
15
DDA
V
14
DDA
V
13
DDD
2 V
4 V
1

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the TLC5510 and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Summary of Contents for Texas Instruments TLC5510

  • Page 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  1994 – 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.
  • Page 2: Functional Block Diagram

    TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 functional block diagram Resistor Reference Divider REFB 270 Ω Lower Sampling REFT Lower Encoder D1(LSB) Comparators (4-Bit) REFBS (4-Bit) Lower Data 80 Ω Latch AGND Lower Sampling...
  • Page 3: Absolute Maximum Ratings

    Pulse duration, clock low, t w(L) (see Figure 1) ‡ The reference voltage levels for the TLC5510 are derived through an internal resistor divider between V DDA and ground and therefore are not derived from a separate external voltage source (see the electrical characteristics and text). For the 4 V input range of the TLC5510A, the reference voltage is externally applied across the center divider resistor.
  • Page 4 TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 electrical characteristics at V = 5 V, V = 2.5 V, V = 0.5 V, f = 20 MHz, T = 25°C (unless REFT REFB (CLK)
  • Page 5: Test Conditions

    TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 operating characteristics at V = 5 V, V = 2.5 V, V = 0.5 V, f = 20 MHz, T = 25°C (unless REFT REFB (CLK)
  • Page 6: Principles Of Operation

    PRINCIPLES OF OPERATION functional description The TLC5510 and TLC5510A are semiflash ADCs featuring two lower comparator blocks of four bits each. As shown in Figure 2, input voltage V (1) is sampled with the falling edge of CLK1 to the upper comparators block and the lower comparators block(A), S(1).
  • Page 7 TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 PRINCIPLES OF OPERATION internal referencing TLC5510 The three internal resistors shown with V can generate a 2-V reference voltage. These resistors are brought out on V , REFTS, REFT, REFB, REFBS, and AGND.
  • Page 8: Application Information

    TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 PRINCIPLES OF OPERATION functional operation The output code change with input voltage is shown in Table 1. Table 1. Functional Operation DIGITAL OUTPUT CODE INPUT SIGNAL...
  • Page 9 FB1, FB2, FB3, FB7 Ferrite bead 2N3414 or equivalent R1, R3 75-Ω resistor 500-Ω resistor 10-kΩ resistor, clamp voltage adjust 300-Ω resistor, reference-voltage fine adjust Figure 5. TLC5510 Evaluation and Test Schematic • POST OFFICE BOX 655303 DALLAS, TEXAS 75265...
  • Page 10 TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 APPLICATION INFORMATION DV DD TLC5510A AV DD Clock V DDD V REF V DDA V DDD V DDA D8 (MSB) REFTS Video REFT Input V DDA...
  • Page 11 V DDD 4.7 µF 0.1 µF REFT 0.1 µF REFBS 0.1 µF 4.7 µF 0.1 µF REFB DGND 4.7 µF DGND AGND AGND † FB – Ferrite Bead Figure 7. TLC5510 Application Schematic • POST OFFICE BOX 655303 DALLAS, TEXAS 75265...
  • Page 12 TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 APPLICATION INFORMATION 0.1µF 6.8µF CLOCK 698Ω TLC5510A 0.1µF 50Ω CLOCK 49.9Ω ANALOG IN OPA690 59Ω 100pF 698Ω 402Ω To Processor 402Ω 0.1µF † 4.7µF 0.1µF 4.7µF 0.1µF...
  • Page 13: Packaging Information

    PACKAGE OPTION ADDENDUM www.ti.com 26-Oct-2016 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing (4/5) TLC5510AINS ACTIVE Green (RoHS CU NIPDAU Level-1-260C-UNLIM -20 to 75 TLC5510AI &...
  • Page 14 PACKAGE OPTION ADDENDUM www.ti.com 26-Oct-2016 Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Lead/Ball Finish - Orderable Devices may have multiple material finish options.
  • Page 15: Tape And Reel Information

    PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) TLC5510AINSR 2000 330.0 24.4 15.3 12.0 24.0 TLC5510INSR 2000 330.0...
  • Page 16 PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2015 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) TLC5510AINSR 2000 367.0 367.0 45.0 TLC5510INSR 2000 367.0 367.0 45.0 TLC5510IPWR TSSOP 2000 367.0 367.0 38.0 Pack Materials-Page 2...
  • Page 20: Important Notice

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.

This manual is also suitable for:

Tlc5510a

Table of Contents