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MAIN PWB CIRCUIT DIAGRAM (11/46) [DDR Interface]
5
VDDR_MEM
D
SDDR_D0
F24
DDR_D0
SDDR_D1
M24
DDR_D1
SDDR_D2
J25
DDR_D2
SDDR_D3
K26
DDR_D3
SDDR_D4
M26
DDR_D4
SDDR_D5
E25
DDR_D5
SDDR_D6
L25
DDR_D6
SDDR_D7
F26
DDR_D7
SDDR_DM0
K24
DDR_DM0
SDDR_DQS0
H25
DDR_DQS0
SDDR_DQS0#
H26
DDR_DQS0_N
SDDR_D8
E29
DDR_D8
SDDR_D9
L29
DDR_D9
SDDR_D10
H28
DDR_D10
SDDR_D11
J29
DDR_D11
SDDR_D12
L27
DDR_D12
SDDR_D13
E27
DDR_D13
SDDR_D14
K28
DDR_D14
SDDR_D15
F28
DDR_D15
SDDR_DM1
J27
DDR_DM1
C
SDDR_DQS1
G28
DDR_DQS1
SDDR_DQS1#
G29
DDR_DQS1_N
SDDR_D16
Y24
DDR_D16
SDDR_D17
AF28
DDR_D17
SDDR_D18
AC25
DDR_D18
SDDR_D19
AD26
DDR_D19
SDDR_D20
AF26
DDR_D20
SDDR_D21
W25
DDR_D21
SDDR_D22
AE25
DDR_D22
SDDR_D23
Y26
DDR_D23
SDDR_DM2
AD24
DDR_DM2
SDDR_DQS2
AB25
DDR_DQS2
SDDR_DQS2#
AB26
DDR_DQS2_N
SDDR_D24
W29
DDR_D24
SDDR_D25
AE29
DDR_D25
SDDR_D26
AB28
DDR_D26
SDDR_D27
AC29
DDR_D27
SDDR_D28
AE27
DDR_D28
SDDR_D29
W27
DDR_D29
SDDR_D30
AD28
DDR_D30
SDDR_D31
Y28
DDR_D31
SDDR_DM3
AC27
DDR_DM3
SDDR_DQS3
AA28
DDR_DQS3
SDDR_DQS3#
AA29
DDR_DQS3_N
B
CD270
104p/16V/1005
CD268
CD269
CD271
104p/16V/1005
104p/16V/1005
104p/16V/1005
CD267
104p/16V/1005
A
All location are from D251 to D320
5
4
VDDR_MEM
CD251
DDR_VRF
104p/16V/1005
CD255
226p/6.3V/2012
CD252
CD254
104p/16V/1005
105p/16V/1005
CD253
102p/50V/1005
F23
DDR_VDDI
AD23
DDR_VDDI
M28
DLL_VAA0
V24
DLL_VAA1
SDDR_A0
P27
DDR_A0
SDDR_A1
U29
DDR_A1
SDDR_A2
R26
DDR_A2
SDDR_A3
U26
DDR_A3
SDDR_A4
P25
DDR_A4
SDDR_A5
T28
DDR_A5
R27
SDDR_A6
DDR_A6
V28
SDDR_A7
DDR_A7
SDDR_A8
R29
DDR_A8
SDDR_A9
T29
DDR_A9
SDDR_A10
V25
DDR_A10
SDDR_A11
R28
DDR_A11
SDDR_A12
V26
DDR_A12
SDDR_BA0
U28
DDR_BA0
SDDR_BA1
T27
DDR_BA1
SDDR_CAS
P24
DDR_CAS_N
SDDR_RAS
N26
DDR_RAS_N
N25
SDDR_CS
U102A
DDR_CS_N
SDDR_WE
T25
FLI10620H
DDR_WE_N
RD262
P29
DDR_CK
RD263
N29
DDR_CK_N
RD276
U27
DDR_CKE
RD265
M27
DDR_ODT
RD268
U24
DDR_CAL
C23
RPLL_AVDD12
D22
DDRPLL_AVDD12
B22
RPLL_AGND
B23
RPLL_AVDD33
E22
DDRPLL_AVDD33
E21
DDRPLL_AGND
C22
RPLL_AGND
CD272
CD274
CD276
CD278
CD280
104p/16V/1005
104p/16V/1005
104p/16V/1005
104p/16V/1005
104p/16V/1005
CD273
CD275
CD277
CD279
104p/16V/1005
104p/16V/1005
104p/16V/1005
104p/16V/1005
CD287
CD289
CD291
102p/50V/1005
102p/50V/1005
102p/50V/1005
CD285
102p/50V/1005
CD286
CD288
CD290
CD292
102p/50V/1005
102p/50V/1005
102p/50V/1005
102p/50V/1005
CD297
105p/16V/1005
4
(No.YA707<Rev.001>)2-29
3
+3V3_A
CD256
CD258
226p/6.3V/2012
103p/50V/1005
RD251
1R0/2012
CD259
226p/6.3V/2012
CD257
103p/50V/1005
RD252
1R0/2012
CD262
226p/6.3V/2012
CD261
103p/50V/1005
CD260
103p/50V/1005
The CKE pull down is for power off
mode DDR self refresh
100/1005
DDR2_CLK
100/1005
DDR2_CLK_N
MAIN PWB(12/46)
103/1005
DDR2_CKE
DDR2_CKE
103/1005
DDR2_ODT
2940/F/1005
+1V2
LD251
CD263
BLM18PG300SN1D
103p/50V/1005
CD264
103p/50V/1005
+3V3_A
LD252
BLM18PG300SN1D
CD265
CD266
103p/50V/1005
103p/50V/1005
CD282
VDDR_MEM
104p/16V/1005
CD281
CD283
CD284
104p/16V/1005
104p/16V/1005
104p/16V/1005
CD293
CD295
102p/50V/1005
102p/50V/1005
CD296
102p/50V/1005
CD294
102p/50V/1005
CD300
226p/6.3V/2012
CD298
CD299
105p/16V/1005
226p/6.3V/2012
3
2-30(No.YA707<Rev.001>)
2
DDR2_D[31:0]
SDDR_D2
PR251
100*4/1005
DDR2_D2
5
4
SDDR_D0
DDR2_D0
6
3
SDDR_D7
7
2
DDR2_D7
SDDR_D5
DDR2_D5
8
1
SDDR_D4
PR252
100*4/1005
DDR2_D4
5
4
SDDR_D1
DDR2_D1
6
3
SDDR_D3
DDR2_D3
7
2
SDDR_D6
DDR2_D6
8
1
PR254
100*4/1005
8
1
SDDR_D15
DDR2_D15
7
2
SDDR_D8
DDR2_D8
6
3
SDDR_D13
DDR2_D13
5
4
SDDR_D10
RD272
100/1005
DDR2_D10
SDDR_D11
RD273
100/1005
DDR2_D11
PR257
100*4/1005
8
1
SDDR_D12
DDR2_D12
7
2
SDDR_D9
DDR2_D9
6
3
SDDR_D14
DDR2_D14
5
4
SDDR_D18
PR258
100*4/1005
DDR2_D18
5
4
SDDR_D16
DDR2_D16
6
3
SDDR_D23
DDR2_D23
7
2
SDDR_D21
DDR2_D21
8
1
SDDR_D17
PR260
100*4/1005
DDR2_D17
5
4
SDDR_D22
DDR2_D22
6
3
SDDR_D20
DDR2_D20
7
2
SDDR_D19
DDR2_D19
8
1
PR261
100*4/1005
8
1
SDDR_D31
7
2
DDR2_D31
SDDR_D29
6
3
DDR2_D29
SDDR_D24
DDR2_D24
5
4
SDDR_D26
RD274
100/1005
DDR2_D26
SDDR_D27
RD275
100/1005
DDR2_D27
PR262
100*4/1005
8
1
SDDR_D28
DDR2_D28
7
2
SDDR_D25
DDR2_D25
6
3
SDDR_D30
DDR2_D30
5
4
SDDR_DM0
RD253
100/1005
DDR2_DM0
DDR2_DM0
SDDR_DM1
RD257
100/1005
DDR2_DM1
DDR2_DM1
SDDR_DM2
RD264
100/1005
DDR2_DM2
DDR2_DM2
SDDR_DM3
RD269
100/1005
DDR2_DM3
DDR2_DM3
SDDR_DQS0
RD254
100/1005
DDR2_DQS0
DDR2_DQS0
SDDR_DQS0#
RD255
100/1005
DDR2_DQS0#
DDR2_DQS0#
SDDR_DQS1
RD259
100/1005
DDR2_DQS1
DDR2_DQS1
SDDR_DQS1#
RD261
100/1005
DDR2_DQS1#
DDR2_DQS1#
SDDR_DQS2
RD266
100/1005
DDR2_DQS2
DDR2_DQS2
SDDR_DQS2#
RD267
100/1005
DDR2_DQS2#
DDR2_DQS2#
SDDR_DQS3
RD270
100/1005
DDR2_DQS3
DDR2_DQS3
SDDR_DQS3#
RD271
100/1005
DDR2_DQS3#
DDR2_DQS3#
DDR2_A[12:0]
SDDR_A11
PR253
100*4/1005
DDR2_A11
8
1
SDDR_A2
DDR2_A2
7
2
SDDR_A8
DDR2_A8
6
3
SDDR_A0
DDR2_A0
5
4
SDDR_A5
PR255
100*4/1005
DDR2_A5
8
1
SDDR_A4
DDR2_A4
7
2
SDDR_A9
DDR2_A9
6
3
SDDR_A6
5
4
DDR2_A6
SDDR_A10
PR256
100*4/1005
DDR2_A10
8
1
SDDR_A12
DDR2_A12
7
2
SDDR_A3
DDR2_A3
6
3
SDDR_A7
DDR2_A7
5
4
SDDR_A1
RD256
100/1005
DDR2_A1
SDDR_BA0
RD258
100/1005
DDR2_BA0
DDR2_BA0
SDDR_BA1
RD260
100/1005
DDR2_BA1
DDR2_BA1
PR259
100*4/1005
5
4
SDDR_RAS
6
3
DDR2_RAS
SDDR_CAS
7
2
DDR2_CAS
SDDR_CS
8
1
DDR2_CS
SDDR_WE
RD277
100/1005
DDR2_WE
MAIN PWB ASS'Y(11/46)
[DDR Interface]
HU-71100006
2
1
DDR2_D[31:0]
D
C
MAIN PWB(12/46)
DDR2_A[12:0]
B
A
1
hb1_main_0612_9/48_0.0
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