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MAIN PWB CIRCUIT DIAGRAM (9/46) [CI Select]
5
MAIN PWB(10/46)
PPKT_D[7..0]
PPKT_D0
PPKT_D1
PPKT_D2
PPKT_D3
PPKT_D4
PPKT_D5
D
PPKT_D6
PPKT_D7
TS_SEL_CI0
MUX_TSI_D0
MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D3
MAIN PWB(8/46),(24/46)
MUX_TSI_D4
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D6
MUX_TSI_D7
MUX_TSI_D7
nTS_SEL_CI0
C
PPKT_CLK
PPKT_CLK
MAIN PWB(10/46)
PPKT_VAL
PPKT_VAL
PPKT_SYNC
PPKT_SYNC
MUX_TSI_VAL
MUX_TSI_VAL
MAIN PWB
MUX_TSI_SYNC
MUX_TSI_SYNC
(8/46),(24/46)
MUX_TSI_CLK
MUX_TSI_CLK
TS_SEL_CI0
nTS_SEL_CI0
MUX_TSI_D0
B
MUX_TSI_D0
MUX_TSI_D1
MUX_TSI_D1
MUX_TSI_D2
MUX_TSI_D2
MUX_TSI_D3
MUX_TSI_D3
MAIN PWB(8/46),(24/46)
MUX_TSI_D4
MUX_TSI_D4
MUX_TSI_D5
MUX_TSI_D5
MUX_TSI_D6
MUX_TSI_D6
MUX_TSI_D7
MUX_TSI_D7
POD_DET#
MAIN PWB(7/46)
R1024
OPEN-330/1005
CI_ACC_EN
CI_CE1_N
R243
000/1005
POD_DET#
R216
OPEN-000/1005
A
All location are from 211 to 220
5
4
U218
PR211
A1
B4
1
1A1
1Y1
101*4/1005
B1
C4
2
1A2
1Y2
C1
D4
3
1A3
1Y3
D1
E4
4
1A4
1Y4
PR212
E3
E2
1
2A1
2Y1
101*4/1005
D2
D3
2
2A2
2Y2
C3
C2
3
2A3
2Y3
B2
B3
4
2A4
2Y4
+3V3_D
A2
A3
1OE
VCC
A4
E1
2OE
DGND
SN74LVC244AZQNR
U212
A1
B4
1A1
1Y1
B1
C4
1A2
1Y2
C1
D4
1A3
1Y3
D1
E4
1A4
1Y4
E3
E2
2A1
2Y1
D2
D3
2A2
2Y2
C3
C2
2A3
2Y3
B2
B3
2A4
2Y4
+3V3_D
A2
A3
1OE
VCC
A4
E1
2OE
DGND
SN74LVC244AZQNR
U219
PR213
A1
B4
1
8
1A1
1Y1
101*4/1005
B1
C4
2
7
1A2
1Y2
C1
D4
3
6
1A3
1Y3
D1
E4
4
5
1A4
1Y4
E3
E2
2A1
2Y1
D2
D3
2A2
2Y2
C3
C2
2A3
2Y3
B2
B3
2A4
2Y4
+3V3_D
A2
A3
1OE
VCC
A4
E1
2OE
DGND
SN74LVC244AZQNR
U213
MDO_D[7..0]
MDO_D0
A1
B4
1A1
1Y1
MDO_D1
B1
C4
1A2
1Y2
MDO_D2
C1
D4
1A3
1Y3
MDO_D3
D1
E4
1A4
1Y4
MDO_D4
E3
E2
2A1
2Y1
MDO_D5
D2
D3
2A2
2Y2
MDO_D6
C3
C2
2A3
2Y3
MDO_D7
B2
B3
2A4
2Y4
+3V3_D
A2
A3
1OE
VCC
A4
E1
2OE
DGND
SN74LVC244AZQNR
+3V3_D
U214
CI_BUFF_EN
1
OE
5
VCC
HOST_A6
2
INA
CI_IORD_N
4
Y
CI_IORD_N
3
GND
74LVC1G125
4
(No.YA707<Rev.001>)2-25
3
MAIN PWB(8/46),(45/46),(46/46)
TS_ST_DATA[7..0]
MAIN PWB(34/46)
TS_ST_DATA0
8
TS_ST_DATA1
7
TS_ST_DATA2
6
TS_ST_DATA3
5
TS_ST_DATA4
8
TS_ST_DATA5
7
TS_ST_DATA6
6
TS_ST_DATA7
5
MAIN PWB(8/46)
MAIN PWB(8/46),(45/46),(46/46)
TS_ST_CLK
TS_ST_CLK
MAIN PWB(34/46)
TS_ST_VAL
TS_ST_VAL
TS_ST_SYNC
TS_ST_SYNC
HOST_WE#
MAIN PWB(8/46)
HOST_WE#
HOST_OE#
HOST_OE#
MAIN PWB(8/46),(46/46)
MAIN PWB(8/46),(24/46)
MAIN PWB(8/46)
MAIN PWB(10/46)
R212
MAIN PWB(8/46)
POD_DET#
OPEN-000/1005
R211
MAIN PWB(7/46)
TS_SEL_CI
000/1005
TS_SEL_CI
1 : TUNER out TS (free)
0 : CI out TS ( scramble)
3
2-26(No.YA707<Rev.001>)
2
HOST_D[15..0]
U211
HOST_D0
B4
A1
B1
A1
HOST_D1
B2
B3
B2
A2
HOST_D2
C4
B1
B3
A3
HOST_D3
C3
C2
B4
A4
HOST_D4
D4
C1
B5
A5
HOST_D5
D2
D3
B6
A6
HOST_D6
E4
D1
B7
A7
HOST_D7
E3
E2
B8
A8
+3V3_D
A3
A2
VCC
DIR
E1
A4
DGND
OE
SN74LVC245AZQNR
POD_DAT_DIR
U217
POD_A7
A1
POD_A7
1A1
1Y1
POD_A6
B1
POD_A6
1A2
1Y2
POD_A8
C1
POD_A8
1A3
1Y3
POD_A4
D1
POD_A4
1A4
1Y4
CI_CE1_N
MAIN PWB(8/46)
E3
CI_CE1_N
2A1
2Y1
POD_A5
D2
POD_A5
2A2
2Y2
POD_A14
C3
POD_A14
2A3
2Y3
POD_A9
B2
POD_A9
2A4
2Y4
A2
1OE
VCC
CI_BUFF_EN
A4
2OE
DGND
SN74LVC244AZQNR
HOST_A[24..0]
U215
HOST_A0
A1
1A1
HOST_A1
B1
1A2
HOST_A2
C1
1A3
HOST_A3
D1
1A4
HOST_A13
E3
2A1
HOST_A10
D2
2A2
HOST_A11
C3
2A3
HOST_A12
B2
2A4
A2
1OE
CI_BUFF_EN
A4
2OE
DGND
SN74LVC244AZQNR
R219
330/1005
R218
330/1005
U216
A1
1A1
B1
1A2
HOST_A4
C1
1A3
HOST_A5
D1
1A4
E3
2A1
MUX_TSI_VAL
D2
MUX_TSI_VAL
2A2
MUX_TSI_SYNC
C3
MUX_TSI_SYNC
2A3
MUX_TSI_CLK
B2
MUX_TSI_CLK
2A4
CI_BUFF_EN
A2
1OE
POD_DET#
A4
POD_DET#
2OE
DGND
SN74LVC244AZQNR
+3V3_D
+3V3_D
C219
C212
C211
R213
R215
103/1005
472/1005
nTS_SEL_CI0
TS_SEL_CI0
R214
103/1005
1
Q211
MMBT4401
MAIN PWB ASS'Y(9/46)
[CI Select]
HU-71100006
2
1
MAIN PWB
CI_D[7..0]
(10/46)
CI_D0
CI_D1
CI_D2
CI_D3
CI_D4
CI_D5
CI_D6
CI_D7
D
POD_DAT_DIR
CI_BUFF_EN
CI_A[14..0]
CI_A7
B4
C4
CI_A6
D4
CI_A8
CI_A4
E4
CI_CE1_N#
E2
CI_CE1_N#
CI_A5
D3
CI_A14
C2
CI_A9
B3
+3V3_D
A3
E1
MAIN PWB
(10/46)
C
CI_A0
B4
1Y1
CI_A1
C4
1Y2
CI_A2
D4
1Y3
CI_A3
E4
1Y4
CI_A13
E2
2Y1
CI_A10
D3
2Y2
CI_A11
C2
2Y3
CI_A12
B3
2Y4
+3V3_D
A3
VCC
E1
CI_WE_N
B4
1Y1
CI_WE_N
CI_OE_N
C4
1Y2
CI_OE_N
CI_REG_N
D4
1Y3
CI_REG_N
CI_IOWR_N
E4
1Y4
CI_IOWR_N
MAIN PWB
E2
2Y1
(10/46)
MDO_VAL
D3
2Y2
MDO_VAL
C2
MDO_SYNC
2Y3
MDO_SYNC
MDO_CLK
B3
2Y4
MDO_CLK
+3V3_D
B
A3
VCC
E1
+3V3_D
C214
C213
C215
C217
C216
C218
A
1
hb1_main_0612_7/48_0.0
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