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MAIN PWB CIRCUIT DIAGRAM (7/46) [I2S]
5
MAIN PWB ASS'Y(7/46)
[I2S]
HU-71100006
D
MAIN PWB (43/46)
MAIN PWB (44/46)
C
B
R178
103/1005
Model1_ID
R179
R175
103/1005
Model2_ID
R171
R176
103/1005
Model3_ID
R172
Model4_ID
R177
OPEN-103/1005
R173
Model1_ID : Panel (H:WXGA,L:FHD)
Model2_ID : Model (H:19,20", L: More than 26")
Model3_ID :
Model4_ID : (H: HB1, L: DB1 )
A
AUO_Panel
R174
R161 OPEN-103/1005
CI_ACC_EN
All location are from 161 to 180
5
4
+3V3_A
L161
BLM18PG300SN1D
C162
C161
104p/16V/1005
106p/10V/2012
LBADC_IN1
LBADC_IN2
TP164
PCB_TP08
LBADC_IN3
1
SCART1_ID
SCART1_ID
SCART2_ID
SCART2_ID
TP165
PCB_TP08
LBADC_IN6
1
TP172
PCB_TP08
1
LBADC_IN1
R163
103/1005
LBADC_IN2
R164
103/1005
LBADC_IN3
R169
103/1005
LBADC_IN6
R170
103/1005
SCART1_ID
SCART2_ID
C166
C165
103p/50V/1005
103p/50V/1005
VXI_CLK
MAIN PWB(36/46)
VXI_DE
VXI_VS
VXI_HS
MAIN PWB(38/46)
VXI_D[0..15]
+3V3_A
OPEN-103/1005
OPEN-103/1005
OPEN-103/1005
103/1005
CI_ACC_EN
CI_ACC_EN
MAIN PWB (9/46)
Model1_ID
Model2_ID
Model3_ID
Model4_ID
AUO_Panel
MAIN PWB (3/46)
AUO_Panel
ST7103_FLASH_EN
ST7103_FLASH_EN
MAIN PWB (46/46)
+3V3_A
103/1005
+3V3_A
4
(No.YA707<Rev.001>)2-21
3
U102D
FLI10620H
D24
LBADC_33
AC2
AUDIN_I2S_BCLK
AB3
AUDIN_I2S_WCLK
E23
AA4
LBADC_GND
AUDIN_I2S_DAT
C25
LBADC_IN1
C24
LBADC_IN2
B25
LBADC_IN3
B24
LBADC_IN4
A25
LBADC_IN5
A24
AC1
LBADC_IN6
AUD_MCLK0
F22
AB5
LBADC_RETURN
AUD_MCLK1
C21
AB4
IRDATA
AUDO_I2SA_BCLK
AC5
AUDO_I2SA_WCLK
AC4
AUDO_I2SA_DAT0
AD2
AUDO_I2SB_DAT1
AE2
AUDO_I2SB_DAT2
AC3
AUDO_I2SB_BCLK
AD3
AUDO_I2SB_WCLK
AA5
AUDIN_SPDIF_IN
AD1
AUDO_SPDIF_OUT
SPDIF_OUT
U102F
FLI10620H
A18
VXI_CLK
C18
VXI_DE
B18
VXI_VS
D18
VXI_HS
VXI_D0
E19
AF15
VXI_D0
VXO_D0
VXI_D1
R166
000/1005
A17
AH16
VXI_D1
VXO_D1
VXI_D2
HEADPHONE_ID
B17
AJ16
VXI_D2
VXO_D2
VXI_D3
C17
AE15
VXI_D3
VXO_D3
VXI_D4
D17
AE16
VXI_D4
VXO_D4
VXI_D5
F17
AF16
VXI_D5
VXO_D5
VXI_D6
A16
AG16
VXI_D6
VXO_D6
VXI_D7
B16
AH17
VXI_D7
VXO_D7
VXI_D8
C16
AJ17
VXI_D8
VXO_D8
VXI_D9
D16
AE17
VXI_D9
VXO_D9
VXI_D10
D19
AF17
VXI_D10
VXO_D10
VXI_D11
E16
AG17
VXI_D11
VXO_D11
VXI_D12
R165
000/1005
A15
AH18
VXI_D12
VXO_D12
VXI_D13
B15
AJ18
VXI_D13
VXO_D13
VXI_D14
C15
AD15
VXI_D14
VXO_D14
VXI_D15
D15
AE18
R167
OPEN-000/1005
VXI_D15
VXO_D15
E15
VXI_D16
R168
102/1005
A14
AF18
VXI_D17
VXO_HS
B14
AG18
VXI_D18/TS_ERR
VXO_VS
C14
AD19
VXI_D19/DREQ_I
VXO_CLK
D14
AE19
VXI_D20/TS_VALID_O
VXO_DE
E14
VXI_D21/TS_SYNC_O
E17
VXI_D22/TS_D_O
E18
VXI_D23/TS_CLK_O
3
2-22(No.YA707<Rev.001>)
2
ST_PCM_SCLK
ST_PCM_LRCLK
ST_PCMOut0
MAIN PWB(38/46)
PR161
ST_PCM_MCLK
330*4/1005
1
8
I2S_OUT_MCLK
2
7
I2S_OUT_CLK
3
6
I2S_OUT_WS
4
5
I2S_OUT_DAT
MAIN PWB(38/46)
ST_SPDIF
MAIN PWB(39/46)
MAIN PWB(24/46)
TS_SEL
CH_TER_RESET
MAIN PWB(26/46)
HEADPHONE_ID
HEADPHONE_ID
MAIN PWB(22/46)
BIT_SEL
MAIN PWB(14/46)
CH_RESET
MAIN PWB(2/46)
ANT_PWR_EN
MAIN PWB(1/46)
ANT_PWR_CHK
TS_SEL_CI
MAIN PWB(9/46)
SC1_SEL
MAIN PWB(13/46)
SC_FB_SEL
PD_RESET
MAIN PWB(40/46)
VGA_SW
ST_RESET
MAIN PWB(37/46)
PANEL_PWR
MAIN PWB(14/46)
OPC_CTL
FRC_MODE0
FRC_MODE1
MAIN PWB(17/46)
FRC_MODESEL
2
1
D
MAIN PWB(22/46)
C
+3V3_A
R162
103/1005
B
MAIN PWB(35/46)
EMIBUSREQ
EMIBUSGNT
MAIN PWB(35/46),(36/46)
MAIN PWB(39/46)
A
1
hb1_main_0612_5/48_0.0
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