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Integrated power management
— Low-power 3.3 volt design
— Internal processor/bus clock multiplier that provides 1/1, 2/1, 3/1 and 4/1 ratios
— Three power saving modes—doze, nap, and sleep
— Automatic dynamic power reduction when internal functional units are idle
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In-system testability and debugging features through JTAG boundary-scan capability
1.3 General Parameters
The following list provides a summary of the general parameters of the 603.
Technology
Die size
Transistor count
Logic design
Package
Power supply
1.4 Electrical and Thermal Characteristics
This section provides the AC and DC electrical specifications and thermal characteristics for the 603.
1.4.1 DC Electrical Characteristics
The tables in this section describe the 603 DC electrical characteristics. Table 1 provides the absolute
maximum ratings.
Characteristic
Core supply voltage
PLL supply voltage
Input voltage
Storage temperature range
Notes:
1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress
ratings only, and functional operation at the maximums is not guaranteed. Stresses beyond those listed may
affect device reliability or cause permanent damage to the device.
2. Caution : V
must not exceed Vdd by more than 2.5 V at anytime including during power-on reset.
in
4
µ
0.5
CMOS (four-layer metal)
11.5 mm x 7.4 mm (85 mm
1.6 million
Fully-static
Surface mount, 240-pin CQFP
3.3 ± 5% V dc
Table 1. Absolute Maximum Ratings
Vdd
AVdd
V
in
T
stg
2
)
Symbol
Value
–0.3 to 4.0
–0.3 to 4.0
–0.3 to 5.5
–55 to 150
603 Hardware Specifications
Unit
V
V
V
° C
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