Philips DVDR985 Technical Training Manual page 116

PINT1N
PRDN
PROGRAMN
PRSTN
R_IN_VIP
R_OUT
R_OUT_B
RAS
RASN
Refsin
Refcos
RESETN
RESETN_BE
RESETN_DVIO
RESETN_VE
ROMH_CEN
ROML_CEN
RSTN_BE
RSTN_DVIO
RSTAT
RTS1P
RTSN
RXD
RX1P
S2B
SCL
SD_CASN
SD_CLK
SD_CLKE
SD_CSN
SD_DQM (1:0)
SD_RASN
SD_WEN
SDA
SEL_ACLK1
SDRAM
Sinphi
SM_CS3N
SM_LBN
SM_OEN
SM_UBN
SM_WEN
SMA (17:0)
SMD (15:0)
SPDIF
SPIDRE
SRAM
SRAMCE0N
SRAMRDN
Processor interrupt 1
Processor read
Low active Input to initiate a configuration cycle
Processor reset
Video Red Input to Video Input Processor
Video Red Output from Host Decoder
Filtered Red Video Output from Host Decoder
Row Address Strobe
Row Address strobe Enable
Reference voltage for Hall sensor amp
Reference voltage for Hall sensor amp
Reset Host Decoder
System reset basic engine (buffered)
System reset Digital Video Input Output (buffered)
System reset Video Encoder
Flash 2 chip Enable
Flash 1 chip Enable
Reset control of basic engine
Reset control of DVIO
Status Read
Ready To Send Data to service serial interface
System Reset
Receive Data
Receive Data from service serial interface
Serial to Basic Engine Communication
I 2 C bus Clock
SDRAM Column Address strobe Output (active LOW)
SDRAM Clock Output
SDRAM Clock Enable Output
SDRAM
SDRAM Data mask Enable Output
SDRAM row Address strobe Output
SDRAM write Enable Output
I 2 C bus Data
Select Audio Clock (playback)
Synchronous DRAM
Sine Position of Hall info
SRAM chip select
SRAM lower bank strobe
SRAM Output Enable
SRAM upper bank
SRAM write Enable
SRAM Address Output
SRAM Data Input/Output
Sony Philips Digital Interface for Audio
Signal Processing IC for DVD REwritable
Static Random Access Memory
SRAM processor chip Enable 0
SRAM processor Output Enable
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