List Of Abbreviations - Philips DVDR985 Technical Training Manual

+12V
+2V5_FLI
+2V5_PLL
+3V3
+3V3_ANA
+3V3_DD
+3V3_DLY
+3V3_DV
+3V3_FLI
+3V3_FPGA
+3V3_FPGA_CONF
+3V3_IEEE_A
+3V3_IEEE_PLL
+3V3_LINK
+3V3_PLL
+3V3_SRAM
+5V
+5V_BUFFER
+5V_PROC
+VCC_DV_RAM
1394_RSTN
5508_HS
5508_ODD_EVEN
-5V
-5V_BUFFER
+35V_DV_EDO
A1, A2
A_EMPRESS (13:0)
ACC_ACLK_OSC
ACC_ACLK_PLL
ACLK_EMP
AD_ACLK
AD_BCLK
AD_DATAO
AD_SPDIF33
AD_WCLK
ADIP
ADC
AE_ACLK
AE_ACLK_OEN
AE_BCLK
AE_BCLK_DV
AE_BCLK_VSM
AE_DATAI
AE_DATAI_DV

List of Abbreviations

+12V Power Supply
+2V5 Power Supply for FLI
+2V5 Power Supply for PLL
+3V3 Power Supply
+3V3 Power Supply Analog
+3V3 Power Supply Digital
+3V3 Power Supply for IC7500
+3V3 Power Supply for IC7404
+3V3 Power Supply for FLI
+3V3 Internal Power Supply for IC7303
+3V3 Power Supply for IC 7300
+3V3 Digital Power Supply for PHY IC 7101
+3V3 PLL Power Supply for PHY IC 7101
+3V3 Power Supply IC7103
+3V3 Power Supply IC7307 & IC7308
+3V3 Power Supply
+5V Power Supply
+5V Power Supply for Video Filters
+5V Power Supply IC7200, IC7201, IC7203 & IC7208
+3V3 Power Supply for DV_RAM (IC7400—> IC7404)
Reset of LINK IC (7103) and PHY IC (7101)
Horizontal Synchronization from Host Decoder to Progressive Scan
Odd - Even control from Host Decoder to Progressive Scan
-5V Power Supply
-5V Power Supply for Video Filters
+3V3 Power Supply EDO Bus IC7404 A (0:8) Address lines
Power Calibration maximum and Minimum signals
EMPRESS Address Output to SDRAM
Audio Clock PLL Output Sync with incoming Video for record
Audio Clock PLL Output for play back
EMPRESS Audio Clock Output
Audio Decoder Clock
Audio Decoder I 2 S bit Clock
Audio Decoder Output Data (PCM)
Audio Digital Output to the Analog Board
Audio Decoder I 2 S word Clock
Address in Pregroove
Analog to Digital Conversion
Audio Encoder Clock
Audio Encoder Clock Output Enable
Audio Encoder I 2 S bit Clock
Audio Encoder I 2 S bit Clock to DVIO
Audio Encoder I 2 S bit Clock to VSM
Audio Encoder Input Data (PCM)
Audio Encoder Input Data (PCM) from DVIO
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