Lsi Pin Description （Lsi端子機能表 - Yamaha MW12CX Service Manual

MW12CX/MW12C
I
LSI PIN DESCRIPTION （LSI端子機能表）
• AK5381VT-E2 (X5219A00) ADC (Analog to Digital Converter)
PIN
NAME
I/O
No.
1 AINR I Rch analog input pin
2 AINL I Lch analog input pin
3 CKS1 I Mode select 1 pin
4 VCOM O Common voltage output pin
5 AGND - Analog ground
6 VA - Analog power supply
7 VD - Digital power supply
8 DGND - Digital ground
• MX23L8103TC-90G (X5922A00) CPU
PIN
NAME I/O
No.
1 A15 I 

2 A14 I

3 A13 I 

4 A12 I

5 A11 I  Address bus

6 A10 I

7 A9 I


8 A8 I
9 (N.C.) -


10 (N.C.) -

11 (N.C.) -


12 (N.C.) - (Unused)

13 (N.C.) -


14 (N.C.) -

15 (N.C.) -

16 A18 I

17 A17 I


18 A7 I

19 A6 I


20 A5 I Address bus

21 A4 I


22 A3 I

23 A2 I


24 A1 I
• PCM1742KEG/2K (X3538A00) DAC (Digital to Analog Converter)
PIN
NAME
I/O
No.
1 BCK I Audio data bit clock input
2 DATA I Audio data digital input.
3 LRCK I L-channel and R-channel audio data latch enable
input
4 DGND - Digital ground
5 VDD - Digital power supply, +3.3 V
6 Vcc - Analog power supply, +5 V
7 VOUTL O Analog output for L-channel
8 VOUTR O Analog output for R-channel
Note:
(1) Schmitt trigger input, 5V tolerant.
(2) Schmitt trigger I/O with internal pull-down, 5V tolerant.
• PCM2900E/2K (X7143A00) USB PROTOCOL CONROLLER
PIN
NAME
I/O
No.
1 D+ I/O USB differential input/output plus
2 D- I/O USB differential input/output minus
3 VBUS - Connect to USB power (VBUS)
4 DGNDU - Digital ground for USB transceiver
5 HID0 I HID key state input(mute), active high
6 HID1 I HID key state input(volume up),active high
7 HID2 I HID key state input(volume down),active high
8 SEL0 I Must be set to high
9 SEL1 I Must be set to high
10 VCCCI - Internal analog power supply for codec
11 AGNDC - Analog ground for codec
12 VINL I ADC analog input for L-channel
13 VINR I ADC analog input for R-channel
14 VCOM - Common for ADC/DAC(VCCCI/2)
30
FUNCTION
FUNCTION
FUNCTION
FUNCTION
PIN
NAME
I/O
No.
9 SDTO O Audio serial data output pin
10 LRCK I/O Output channnel clock pin
11 MCLK I Master clock input pin
12 SCLK I/O Audio serial data clock pin
13 PDN I Power down mode pin
14 DIF I Audio interface format pin
15 CKS2 I Mode select 2 pin
16 CKS0 I Mode select 0 pin
PIN
NAME I/O
No.
25 A0 I Address bus
26 CE# I Chip enable
27 VSS - Ground
28 OE# I Output enable

29 D0 O

30 D8 O

31 D1 O 

32 D9 O

Data bus
33 D2 O 

34 D10 O

35 D3 O 

36 D11 O
37 VCC - Power supply +3.3 V
38 D4 O 

39 D12 O


40 D5 O

41 D13 O Data bus


42 D6 O

43 D14 O

44 D7 O 
45 D15/A-1 I/O Data bus / LSB address
46 VSS - Ground
47 BYTE# - Word/byte mode selection
48 A16 I Address bus
PIN
NAME
I/O
No.
9 AGND - Analog ground
10 VCOM - Common voltage decoupling.
11 ZEROR/ZEROA O Zero flag output for R-channel/Zero flag output
for L/R-channel
12 ZEROL/NA O Zero flag output for L-channel/No assign
13 MD I Mode control data Input
14 MC I Mode control clock input
15 ML I Mode control latch input
16 SCK I System clock input
PIN
NAME
I/O
No.
15 VOUTR O DAC analog output for R-channel
16 VOUTL O DAC analog output for L-channel
17 VCCP1I - Internal analog power supply for PLL
18 AGNDP - Analog ground for PLL
19 VCCP2I - Internal analog power supply for PLL
20 XTO O Crystal oscillator output
21 XTI I Crystal oscillator input
22 AGNDX - Analog ground for oscillator
23 VCCXI - Internal analog power supply for oscillator
24 TEST0 I Test pin, must be connected to GND
25 TEST1 O Test pin, must be left open
26 DGND - Digital gronud
27 VDDI - Internal digital power supply
28 SSPND O Suspend flag, active low
(Low: suspend, High: operational)
DSP2: ICM04
FUNCTION
DSP2: ICM10
FUNCTION
DSP2: ICM08
FUNCTION
USB: ICM101
FUNCTION