Lsi Pin Description - Yamaha DTXPRESS Service Manual

DTXPRESS

LSI PIN DESCRIPTION

HG73C205FD (XU947A00) SWX000 TONE GENERATOR
PIN
NAME I/O
No.
1 ICN I Initial clear
2 RFCLKI I PLL Clock
3 TM2 I PLL Control
4 AVDD_PLL Power supply
5 AVSS_PLL Ground
6 MODE0 I SWX dual mode
7 VCC7 Power supply
8 GND8 Ground
9 XIN I crystal oscillator
10 XOUT O crystal oscillator
11 MODE1 I SWX separate mode
12 TEST0 I TEST pin
13 TESTON I TEST pin
14 AN0-P40 I A/D converter
15 AN1-P41 I A/D converter
16 AN2-P42 I A/D converter
17 AN3-P43 I A/D converter
18 AVDD_AN Power supply
19 AVSS_AN Ground
20 TXD0 O for MIDI or TO-HOST
21 TXD1 O for MIDI
22 EXCLK I Crystal oscillator
23 SMD11 I/O Wave memory data bus
24 SMD4 I/O Wave memory data bus
25 SMD3 I/O Wave memory data bus
26 SMD12 I/O Wave memory data bus
27 SMD10 I/O Wave memory data bus
28 SMD5 I/O Wave memory data bus
29 SMD2 I/O Wave memory data bus
30 SMD13 I/O Wave memory data bus
31 SMD9 I/O Wave memory data bus
32 SMD6 I/O Wave memory data bus
33 SMD1 I/O Wave memory data bus
34 SMD14 I/O Wave memory data bus
35 VCC35 Power supply
36 GND36 Ground
37 SMD8 I/O Wave memory data bus
38 SMD7 I/O Wave memory data bus
39 SMD0 I/O Wave memory data bus
40 SMD15 I/O Wave memory data bus
41 SOE O read signal
42 SWE O write signal
43 SRAS O RAS signal
44 SCAS O CAS signal
45 REFRESH O REFRESH signal
46 CS0 O CS signal
47 SMA0 O Memory address bus
48 SMA16 O Memory address bus
49 VCC49 Power supply
50 GND50 Ground
51 SMA1 O Memory address bus
52 SMA15 O Memory address bus
53 SMA2 O Memory address bus
54 SMA14 O Memory address bus
55 SMA3 O Memory address bus
56 SMA13 O Memory address bus
57 SMA4 O Memory address bus
58 SMA12 O Memory address bus
59 SMA5 O Memory address bus
60 GND60 Ground
61 VCC61 Power supply
62 SMA11 O Memory address bus
63 SMA6 O Memory address bus
64 SMA10 O Memory address bus
65 SMA7 O Memory address bus
66 SMA9 O Memory address bus
67 SMA17 O Memory address bus
68 SMA8 O Memory address bus
69 SMA18 O Memory address bus
70 SMA19 O Memory address bus
71 SMA20 O Memory address bus
72 SMA21 O Memory address bus
73 SMA22 O Memory address bus
74 SMA23 O Memory address bus
75 CMA20 O Program address bus
76 CMA19 O Program address bus
77 VCC77 Power supply
78 GND78 O Ground
79 CMA18 O Program address bus
80 CMA17 O Program address bus
81 CMA5 O Program address bus
82 CMA6 O Program address bus
83 CMA4 O Program address bus
84 CMA7 O Program address bus
10
FUNCTION
DM IC001
PIN
NAME I/O
No.
85 CMA3 O Program address bus
86 CMA8 O Program address bus
87 CMA2 O Program address bus
88 CRD O read signal
89 CMA1 O Program address bus
90 CUB O high byte effective signal
91 VCC91 Power supply
92 GHND92 Ground
93 CS1 O CS signal
94 CMA0 O Program address bus
95 CLB O low byte effective signal
96 CMA12 O Program address bus
97 CMA11 O Program address bus
98 CMA10 O Program address bus
99 CMA9 O Program address bus
100 GND100 Ground
101 CWE O write signal
102 CMA16 O Program address bus
103 CMA15 O Program address bus
104 CMA14 O Program address bus
105 CMA13 O Program address bus
106 CMD8 I/O Program memory Data bus
107 CMD7 I/O Program memory Data bus
108 CMD9 I/O Program memory Data bus
109 CMD6 I/O Program memory Data bus
110 CMD10 I/O Program memory Data bus
111 CMD5 I/O Program memory Data bus
112 CMD11 I/O Program memory Data bus
113 CMD4 I/O Program memory Data bus
114 CMD12 I/O Program memory Data bus
115 CMD3 I/O Program memory Data bus
116 CMD13 I/O Program memory Data bus
117 CMD2 I/O Program memory Data bus
118 CMD14 I/O Program memory Data bus
119 VCC119 Power supply
120 GND115 Ground
121 CMD1 I/O Program memory Data bus
122 CMD15 I/O Program memory Data bus
123 CMD0 I/O Program memory Data bus
124 CMA21 O Program address bus
125 PDT15 I/O SWX access data bus
126 PDT14 I/O SWX access data bus
127 PDT13 I/O SWX access data bus
128 PDT12 I/O SWX access data bus
129 PDT11 I/O SWX access data bus
130 PDT10 I/O SWX access data bus
131 PDT9 I/O SWX access data bus
132 PDT8 I/O SWX access data bus
133 VCC133 Power supply
134 GND134 Ground
135 PDT7 I/O SWX access data bus
136 PDT6 I/O SWX access data bus
137 PDT5 I/O SWX access data bus
138 PDT4 I/O SWX access data bus
139 PDT3 I/O SWX access data bus
140 PDT2 I/O SWX access data bus
141 PDT1 I/O SWX access data bus
142 PDT0 I/O SWX access data bus
143 VCA143 Power supply
144 GND144 Ground
145 PAD2 I SWX access address bus
146 PAD1 I SWX access address bus
147 PAD0 I SWX access address bus
148 VCC148 Power supply
149 GND149 Ground
150 PCS I Chip select
151 PWR I write enable
152 PRD I read enable
153 RXD0 I for Midi or TO-HOST
154 RXD1 I for Midi or Key scan
155 SCLKI I EXT Clock
156 ADIN I A/D converter
157 ADLR O A/D converter LR clock
158 DO0 O DAC
159 DO1 O DAC
160 SYSCLK O 1/2 clock
161 VCC161 Power supply
162 GND162 Ground
163 WCLK O for DAC LR clock
164 QCLK O 1/12 clock
165 BCLK O IIS-DAC clock
166 SYI I Synch signal
167 IRQ0 I Interrupt request
168 NMI I Interrupt request
FUNCTION