Lippert PC/104-Plus Technical Manual page 23

Technical Manual PC/104-Plus "Cool RoadRunner II" Version 1.16
Index-register
0xf4
(default = 00)
0xf4
0xf4
0xf4
0xe2
0xf6
Program example:
SMCW 07 08
SMCW f1 80
SMCW f2 1e
SMCW f3 02
SMCW e2 8a
The status if the watchdog has generated a reset can be read through the register F6, Bit1
(Bit0 and Bit2-Bit7 are don't care) of the Super I/O. A low level at this pin indicates that a
watchdog time-out has occurred and the watchdog has generated a reset.
© LIPPERT Automationstechnik GmbH • Hans-Thoma-Str. 11 • 68163 Mannheim • Tel: 0621/43214-0 • Fax: 0621/43214-30
Data
Bit [0] = 0
bit [0] = 1
bit [2] = 1
bit [1] , [7..3] = 0
0x8a
bit [1] = 0
bit [0] , [7..2] =
dont care
(select functional group)
(timer unit in seconds)
(time-out in 30 timer units)
(WDT reset upon keyboard interrupt)
(hardware reset upon WDT time-out)
April 2004
Action
WD timer counting
WD timer occurred
forces time-out event
(self-clearing)
Reserved
hardware reset upon
WDT time-out
WDT has generated
a reset
Page 23 of 42
Program
SMCR/W f3 x0
SMCR/W f3 x1
SMCR/W f3 x4
-----------------
SMCW e2 8a
SMCR f6