Sony SA-WSF200 Service Manual page 109

Pin No. Pin Name
55 DVDD18
HA2 to HA8, HA18,
56 to 64
HA19
65 DVDD3
66 XWR
67 to 75 HA16 to HA9, HA20
76 XROMCS
77 HA1
78 XRD
79, 80 HD0, HD1
81 DVSS
82 to 86 HD2 to HD6
87 HA21
88 RESERVED
89 HD7
90 DVSS
91, 92 HA17, HA0
93 DVDD18
94 FWD
95 REV
96 DVDD3
97 IFSDO
98 IFCK
99 xIFCS
100 IFSDI
101 SCL
102 SDA
103 CKSW
104 OCSW
105 RXD
106 TXD
107 ICE
108 xSYSRST
109 RESERVED
110 xIFBSY
111 DQM0
112 EEWP
113 to 117 RD7 to RD3
118 DVDD3
RD2 to RD0,
119 to 129
RD15 to RD8
130 TSD_M
131 DVDD3
132 DQM1
133 RWE
134 CAS
135 RAS
136 RCS
137, 138 BA0, BA1
139 to 141 RA10, RA0, RA1
142 DVDD18
143, 144 RA2, RA3
145 DVDD3
146 DRCLK
147 CKE
148 DVSS
I/O
- Power supply terminal (+1.8V)
O Address signal output to the fl ash ROM
- Power supply terminal (+3.3V)
O Write enable signal output to the fl ash ROM
O Address signal output to the fl ash ROM
O Chip select signal output to the fl ash ROM
O Address signal output to the fl ash ROM
O Read enable signal output to the fl ash ROM
I/O Two-way data bus terminal with the fl ash ROM
- Ground terminal
I/O Two-way data bus terminal with the fl ash ROM
O Address signal output to the fl ash ROM
- Not used
I/O Two-way data bus terminal with the fl ash ROM
- Ground terminal
O Address signal output to the fl ash ROM
- Power supply terminal (+1.8V)
O Loading motor drive signal output terminal (forward direction)
O Loading motor drive signal output terminal (reverse direction)
- Power supply terminal (+3.3V)
O Serial data output to the system controller
O Serial data transfer clock signal output to the system controller
O Chip select signal output to the system controller
I Serial data input from the system controller
O Serial data transfer clock signal output to the EEPROM
I/O Two-way data bus with the EEPROM
I Chucking detection switch input terminal
I Disc table open/close detection switch input terminal
I Receive data input terminal for UART communication when data writing to fl ash memory
O Transmit data output terminal for UART communication when data writing to fl ash memory
I ICE mode enable signal input terminal
I Reset signal input from the system controller
- Not used
I Busy signal input from the system controller
O Data mask signal output to the SD-RAM
O Write protect signal output to the EEPROM
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM
O Thermal shut down signal output to the motor/coil driver
- Power supply terminal (+3.3V)
O Data mask signal output to the SD-RAM
O Write enable signal output to the SD-RAM
O Column address strobe signal output to the SD-RAM
O Row address strobe signal output to the SD-RAM
O Chip select signal output to the SD-RAM
O Bank address signal output to the SD-RAM
O Address signal output to the SD-RAM
- Power supply terminal (+1.8V)
O Address signal output to the SD-RAM
- Power supply terminal (+3.3V)
O Serial data transfer clock signal output to the SD-RAM
O Clock enable signal output to the SD-RAM
- Ground terminal
HCD-F200/F500
Description
Not used
"L": reset
55