LG 77EG9700 Service Manual page 95

GPIO (U14/URSA9)
GPIO[0] : Pull Down
OSD_SET
: No Setting
GPIO[0] Pull UP, GPIO[1] Pull Down
: 1920x1080@60p
FHD_D9_SET
GPIO[0] Pull UP, GPIO[1] Pull UP
: 2560x1080@60p
H13
H13_CONNECT
IC100
LG1154
URSA9_CONNECT
URSA9
IC2500
IC12301
U14_FLASH_WP
MX25L3206EM2I-12G
SPI FLASH(4MByte)
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
T23 [GPO 0]
T24 [GPO 1]
U23 [GPO 2]
U24 [GPO 3]
V23 [GPIO 4]
U14
IC12300
LG1614
UART2_TX
P1900
12507WS-04L UART2_RX
URSA_UART
URSA_RESET
H13D
IC100
PANEL_I2C_SCL1/SDA1
P13000
[51P Vx1 output wafer]
Chip Config
Debug/ISP ADDR
Slabe (Debug Port:0XB4,ISP:0X98)
CHIP_CONF=3'd7:111:boot from SPI Flash
URSA Option
URSA_OPT_0
URSA_OPT_0 : Rx Interface
(1 : LVDS, 0 : Vx1)
URSA_OPT_1
URSA_OPT_1 : Module Type
(1 : LGD, 0 : OS)
URSA BIT Lane
BIT [2/1/0] : Tx Lane
0 / 0 / 0 : 4K@120 (16lane)
URSA_BIT0
0 / 0 / 1 : 4k@60 (8lane)
URSA_BIT1
0 / 1 / 0 : 5k@120 (20lane)
0 / 1 / 1 : Reserved
URSA_BIT2
1 / 0 / 0 : FHD@120 (4lane)
1 / 0 / 1 : FHD@60 (2lane)
1 / 1 / 0 : Reserved
1 / 1 / 1 : Reserved
POWER_DET
EDID_WP
URSA9_CONNECT
U14
Vx1_LOCKn_O/URSA_LOCK_
IC12300
LG1614
Vx1_LOCKn_V/URSA_LOCK_
IC1901
FLASH_WP_URSA
SPI Flash 4MB
MX25L3206EM2I-12G
B4 GPIO[0]
[UART2_TX]
A4 GPIO[1] [UART2_RX]
AF29 RESET
TCON_I2C_EN
AE28 INT_R21/GPIO[41]
I2C_SCL1/SDA1
3D_EN
AG27 SPI4_CK/DIM8/GPIO52
L_DIM_EN
AG26 SPI4_DI/DIM9/GPIO53
DIM 0
AG23 DIM0/GPIO[32]
DIM 1
AG20 DIM1/GPIO[33]
DIM 1
AH23 DIM2/GPIO[34]
AH20 DIM3/GPIO[35]
AG21 DIM4/GPIO[36]
URSA9
IC2500
AH22 DIM5/GPIO[37]
AG22 DIM6/GPIO[38]
AH21 DIM7/GPIO[39]
AG18 GPIO[12]
AJ20 GPIO[13]
AH18 GPIO[14]
AG19 GPIO[15]
O
AH19 GPIO[16]
V
AJ21 GPIO[17]
LGE Internal Use Only