LG 77EG9700 Service Manual page 79

H13 Block Diagram (Internal)
Analog Chip Total Pin : 183w/o Power
GBB AFE
DIF
1ch@30MHz
w/ PLL
Tuner
SIF
BTSC AFE
10b@18.432MHz
w/ PLL
Audio L/R(4-
Audio-ADC
ch)
24b@48KHz
SCART out
Audio DAC
Line Out
Audio DAC (48KHz)
CVBS(3ch)
CVBS-Out CVBS AFE(2-ch)
12b@54MHz
3ch Video
Component(2ch)
10b@148.5MHz
w/ LLPLL
I2Cx1
I2Cx1
HDMI
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
AtoDPin : 79
H13A
SDRAM
(MCP)
Global Baseband
V/Q, DVB-T/C ISDB-T
1ch L/R
I2S
I2S
(48KHz )
I2S
Digital AMP
SPDIF
5x1ch (1ch)
CVBS DAC
10x3ch
Capture
AFE
LVDS
Block
Tx
(3CH)
Audio PLL
w/ DCO
GPIOIx16
DVB-CI/CI+
TS(P) TS(P) TS(S)
TS(S)
System
TS (P)
Demux
AAD
(THAT)
Audio DSP
Audio
I2S(External) Multi-STD
Audio Decoder
LX4 HiFi EP
Sound DSP
Clear Voice II
Perceptual
Volume Control
I2S(HPD)
Slim SPK
Digital
DivX
Audio
Bluetooth
Output
CVBS
Encoder
CVD DE
Y/C
MCU
CVBS
LVDS
Rx
HDMI
(1-Link)
HDMI-Rx 1.4
(1-port PHY) DDR3 Controller
3D, ARC, 4kx2k
DDR3 PHY
16
Digital Chip Total Pin : 491w/o Power
H13D
Video Decoder
GPU Rogue Han
Multi-STD
HD Decoder
2D GFX
(Boda950)
JPG/PNG Decoder
JPG Encoder
Video Encoder
1080p@30fps
TrustZone
CPU
Secure Engine
CPU
48KB ROM
ARMCA9 Core
64KB SRAM
Dual 1.2GHz
OTP
32KBI$
32KBD$
UART
1MB L2 $
Timer
BE
MCU
DDR3 Controller
DDR3 PHY
8
USB2.0x3
UARTx3
GPIOx136
EMAC
SCI
SPIx2
I2Cx10
USB3.0 x1
eMMC
DMAC(8ch)
Timer
WDT
SRAM 16KB
DCO
CPLL
x2
SPLL DPLL
DDR DDR
PLL PLL
LGE Internal Use Only