LG 77EG9700 Service Manual page 83

U14 Block Diagram (Internal)
• MCU
 Tensilica's 108mini
• Memory
 Unified memory architecture
 DDR3-1600MHz 32bit
• Interface
 Input
: HS-LVDS 4-link (2+2)
: HDMI1.4 2-port
 Output
: HS-LVDS 6-link (4+2)
: Vx1 12-lane (8+4)
• PKG
 23X23 FcBGA
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Only for training and service purposes
Digital die
DDR I/F(32bitx1)
800MHz
2
H13D
I2C(S)
4
H13D SPI(S)
1
H13D Reset
(GPIO)
24
HS LVDS Rx
H13D
2-link
24
H13D
HS LVDS Rx
2-link
14
HDMI Rx
HDMI Switch
1.4b
14
HDMI Switch
HDMI Rx
1.4b
5
JTAG Ready
JTAG
4
Serial Flash
SPI(M)
2
UART
RS-232C
76
Tensilica
108m@198MHz
Super-Resolution
ROM 8KB
FHD3840x2160
I$16KB D$8KB
IRAM128KB DRAM128KB
4K@60P PQ
Sharpness/Color/Contrast
4K 2D-to-3D
UGM/Local Dimming
Gamma/WB
Separate OSD
2 4
Combo Tx 48
HS LVDS 4-link
Vx1 8-lane
Combo Tx
24
HS LVDS 2-link
Vx1 4-lane
2
I2C(M/S)
8
GPIO
2
Crystal
LGE Internal Use Only