HEIDENHAIN TNC151B Service Instructions Manual page 63

HEIIJENHAIN
DR. JOHANNES HEIDENHAIN GmbH
D-8225Traunreut 'Tel. (08669) 31-O
SERVICE MANUAL 'INC 151/155
Pawa 53
Kundendienst
Se&ion 4.1
- The data of the CLP processor is transferred to the analog
outputs via the serial CRU bus. The digital output values
calculated for all axes are multiplexed on the CRU OUT line
and are converted in a 12 bit parallel format on the analog
board. These successive digital values are then converted
in analog values (voltages) by means of a DAW -42.1- (digi-
tal-analog-converter). These voltages are compared with the
adjusted values of the override and feed potentiometers
-42- and the results are transmitted to the CLP processor
via CRUIN. The output voltages can thus be adapted to the
values adjusted by the override or, respectively, the feed
potentiometer. The X-, Y-, Z-, IV- and S-analog values
generated shortly one after the other at the output of the
DAW are allocated to the single axes by means of five
samples and hold circuits -42.2-. The five individual
analog voltages are amplified and buffered subsequently
-42.3- and are led to the terminal board.
On the analog board the buffer battery (3,46V) and the
internal temperature (65') of the control are also super-
vised -41-. The supervision signals are led to the CLP
processor via the CRUIN line.
Two "watch dog" monoflops -41.1-
are
on the analog board.
These must be triggered separately once every 5ms by the
CLP processor -2O- and once every 2Oms by the main pro-
cess~r -3O-. If the monoflops are not driven within 5ms
or
2oms (error state),
an emergency-stop signal is
triggered.
The drive of the screen is another important task of the
TNC 151 CLP processor. It only has to write the texts to
be displayed into the CRT RAM -31.1-. A special CRT con-
troller TMS 9937 -31- generates the necessary addresses
for the CRT RAM and the character generator IC-Pl -31.2-
so that the data are transferred to the shift register
-31.3- in the right sequence. Thus signal can be inverted
by means of an exclusive-or-gate -31.4- to generate an
inverse video display. The video signal, the bright/dark
signal, the horizontal/vertical sync. signals and an 11V
supply are used to operate the screen.
The function of the TNC 155 CLP graphic processor is simi-
lar. The screen can either be operated in the text or in
the graphic mode. The control of the routine processes
required for the test an the graphic representation are
taken
over
by the graphic controller ClpD 7220 -31-.
This controller has to receive the corresponding commands
and pertaining parameters of the CLP processor via the data
bus. To permit a fast generation of a given representation
all necessary conunands and parameters are calculated in
advance and are stored in the 64K x 8 dynamic graphic
memory. Priority decisions between reading or, respective-
ly, writing and refreshing of the memory are carried out by
the DRAM controller -31.5- The graphic controller, which
is dependent on the commands received by the CLP processor,
sets up the required bit pattern in the 32k x 16 video
memory. The constant issue of these data and
the
synchroni-
sation signal to the screen is also controlled by the
graphic controller.
In the graphic mode the 16-bit-pixel-
words are read out by the CLP processor and are converted
in a serial format by means of a graphic shift register
-31.7-. The signal can be inverted by means of an exclusive
-or-gate -31.4- to generate, under certain circumstances,
an inverse video display.
In the text mode the video memory contains the 6-bit-ASCII-
values and the pertaining mode data. The ASCII values and
some of the mode bytes form the addresses for the character
generator IC-Pl -31.2-. The bit pattern for the momentarily
addressed sequence of the intended sign is converted in a
serial format by means of a video shift register -31.3-.