4. Operating Principles
4.1 System Mapping
Device
Flash ROM
SRAM
COM1 BASE
COM2 BASE
Interrupt No. Interrupt mapping
0
1
2
3
4
5
6
7
8
9
0A
0B
0C
0D
10
11
12
13
14
I-7188XB Series User's Manual(Ver.1.0, Apr/2007, 7MH-020-10 ) --- 47
Address mapping
512K: from 8000:0000 to F000:FFFF
256K: from 0000:0000 to 3000:FFFF
512K: from 0000:0000 to 7000:FFFF
0XFF80 to 0XFF88
0XFF10 to 0XFF18
Divided by zero
Trace
NMI
Break point
Detected overflow exception
Array bounds exception
Unused opcode exception
ESC opcode exception
Timer 0
Reserved
DMA-0
DMA-1
\INT0 of the I/O expansion bus
\INT1 of the I/O expansion bus
\INT4 of the I/O expansion bus
COM2
Timer 1
Timer 2
COM1