Aiwa XD-DV370 Service Manual page 58

IC DESCRIPTION - 10/11(GDC25D801C)-1/5
Pin No. Pin Name
1 DAT1
2 DAT2
3 DAT3
4 DAT4
5 DAT5
6 DAT6
7 DAT7
8 DAT8
9 DAT9
10 DAT10
11 DAT11
12 DAT12
13 DAT13
14 DAT14
15 DAT15
16 DAT16
17 VSS
18 ADD1
19 ADD2
20 ADD3
21 ADD4
22 VDD
23 ADD5
24 ADD6
25 ADD7
26 ADD8
27 ADD9
28 X2_MCK
29 VSS
30 MCK
31 VDD
32 RAS
33 UCAS
34 LCAS
35 WE
36 OE
37 SCAN_IN
38 TEST_SE
39 TEST_OUT12
40 TEST_OUT11
41 TEST_OUT10
42 TEST_OUT9
I/O
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
I/O Bi-directional data to DRAM
– Digital ground
O Address output to DRAM
O Address output to DRAM
O Address output to DRAM
O Address output to DRAM
– Digital power supply
O Address output to DRAM
O Address output to DRAM
O Address output to DRAM
O Address output to DRAM
O Address output to DRAM
I Master clock from oscillator for 2x decoding
– Digital GND
I Master clock from oscillator
– Digital power supply
O Row address strobe to DRAM
O Column address upper byte control strobe to DRAM
O Column address lower byte control strobe to DRAM
O Write enable signal to DRAM
O Output enable signal to DRAM
I Scan data input
I Test mode selection (low for normal)
O Test output (Not used)
O Test output (Not used)
O Test output (Not used)
O Test output (Not used)
Description
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