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Automationdirect.com DL05 User Manual

Automationdirect.com DL05 User Manual

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Page 1 DL05 User Manual Automationdirect.com...
Page 2 DL05 User Manual Automationdirect.com...
Page 3 770–844–4200. This publication is based on information that was available at the time it was printed. At Automationdirect.com we constantly strive to improve our products and services, so we reserve the right to make changes to the products and/or publications at any time without notice and without any obligation.
Page 4 AVERTISSEMENT Nous vous remercions d’avoir acheté l’équipement d’automatisation de Automationdirect.comE. Nous tenons à ce que votre nouvel équipement d’automatisation DirectLOGIC fonctionne en toute sécurité. Toute personne qui installe ou utilise cet équipement doit lire la présente publication (et toutes les autres publications pertinentes) avant de l’installer ou de l’utiliser.
Page 5 Manual Revisions If you contact us in reference to this manual, remember to include the revision number. Title: DL05 Micro PLC User Manual Manual Number: D0–USER–M Edition/Rev Date Description of Changes Original 12/98 original issue 2nd Edition 2/00 added pid chapter, analog module chapter, and...
Page 6: Table Of Contents
1–12 Questions and Answers about DL05 Micro PLCs ........
Page 7 2–3 Orientation to DL05 Front Panel ............
Page 8 Table of Contents D0–05DD General Specifications ........... . . 2–33 DC Input Specifications .
Page 9 Table of Contents Functional Block Diagram ............3–6 Wiring Diagram .
Page 10 4–2 DL05 CPU Features ..............
Page 11 4–6 Changing Modes in the DL05 PLC ........... .
Page 12 4–33 Networking DL05 Master to Other PLCs ..........
Page 13 viii Table of Contents Using Boolean Instructions ............5–4 END Statement .
Page 14 Table of Contents Immediate Instructions ............. . . 5–26 Store Immediate (STRI) .
Page 15 Table of Contents And Double (ANDD) ..............5–56 Or (OR) .
Page 16 Table of Contents Reset Watch Dog Timer (RSTWT) ........... . 5–95 Program Control Instructions .
Page 17 Table of Contents Drum Instruction Block Diagram ............6–8 Powerup State of Drum Registers .
Page 18 Chapter 8: PID Loop Operation DL05 PID Loop Features ............. .
Page 19 8–51 Cascaded Loops in the DL05 CPU ...........
Page 20 Table of Contents Process Alarms ..............8–53 PV Absolute Value Alarms .
Page 21 ..............A–10 Appendix B: DL05 Error Codes Appendix C: Instruction Execution Times Introduction .
Page 22 ........D–4 Appendix E: DL05 Product Weights Product Weight Table .
Page 23: Chapter 1: Getting Started
— Introduction — Conventions Used — DL05 Micro PLC Components — Programming Methods — I/O Selection Quick Chart — Quick Start for PLC Checkout and Programming — Steps to Designing a Successful System — Questions and Answers about DL05 Micro PLCs...
Page 24: Introduction
If you are a new DL05 customer, we suggest you read this manual completely so you can understand the wide variety of features in the DL05 family of products. We believe you will be ...
Page 25: Conventions Used
1–3 Getting Started Conventions Used When you see the “light bulb” icon in the left-hand margin, the paragraph to its immediate right will give you a special tip. The word TIP: in boldface will mark the beginning of the text. When you see the “notepad”...
Page 26: Dl05 Micro Plc Components
Units with DC outputs offer selectable pulse output capability on the first and second output points. All DL05 Micro PLCs offer a large amount of program memory, a substantial instruction set and advanced diagnostics. Details of these features and more are covered in Chapter 4, CPU Specifications and Operation.
Page 27: Handheld Programmer
D2–HPPs with firmware version 1.09 or later will program the DL05. I/O Selection Quick Chart The eight versions of the DL05 have Input/Output circuits which can interface to a wide variety of field devices. In several instances a particular Input or Output circuit can interface to either DC or AC voltages, or both sinking and sourcing circuit arrangements.
Page 28: Quick Start For Plc Checkout And Programming
Step 1: Unpack the DL05 Equipment Unpack the DL05 and gather the parts necessary to build this demonstration system. The recommended components are: DL05 Micro PLC AC power cord or DC power supply Toggle switches (see Step 2 on next page).
Page 29: Step 2: Connect Switches To Input Terminals
240VAC-powered units. discrete inputs will only accept 120VAC nominal. Also, remove power and unplug the DL05 when wiring the switches. Only use UL-approved switches rated for at least 250VAC, 1A for AC inputs. Toggle Switches, UL Listed Firmly mount the switches before using.
Page 30: Step 3: Connect The Power Wiring
Most programmers will use DirectSOFT programming software, installed on a personal computer. Or, you may need the portability of the Handheld Programmer. Both devices will connect to COM port 1 of the DL05 via the appropriate cable. Use cable part # D2–DSCBL...
Page 31: Step 5: Switch On The System Power
If you are learning how to program with the Handheld Programmer, make sure the CPU is in Program Mode (the RUN LED on the front of the DL05 should be off). If the RUN LED is on, use the MODE key on the Handheld Programmer to put the PLC in Program Mode.
Page 32: Steps To Designing A Successful System
Installation design a safer, more reliable system. This Guidelines chapter also includes wiring guidelines for the various versions of the DL05 PLC. Step 2: The PLC is the heart of your automation Understand the system. Make sure you take time to...
Page 33: Step 6: Review The Programming Concepts
1–11 Getting Started Step 6: The DL05 PLC instruction set provides for three main approaches to solving the Review the application program, depicted in the figure below. Programming Concepts RLL diagram-style programming is the best tool for solving boolean logic and general CPU register/accumulator manipulation.
Page 34: Questions And Answers About Dl05 Micro Plcs
High-Speed I/O capabilities. Q. Do I have to buy the full DirectSOFT programming package to program the DL05? A. No. We offer a DL05-specific version of DirectSOFT that’s very affordable. Q. Is the DL05 expandable? A.
Page 35 1–13 Getting Started Q. Which devices can I connect to the communication ports of the DL05? A. Port 1: The port is RS-232C, fixed at 9600 baud, and uses the proprietary K-sequence protocol. The DL05 can also connect to MODBUS and DirectNET networks as a slave device through port 1.
Page 36: Chapter 2: Installation, Wiring, And Specifications
Installation, Wiring, and Specifications In This Chapter..Safety Guidelines Orientation to DL05 Front Panel Mounting Guidelines Wiring Guidelines System Wiring Strategies Glossary of Specification Terms Wiring Diagrams and Specifications D0-10ND3 DC Input D0-16ND3 DC Input D0-10TD1 DC Output...
Page 37: Plan For Safety
The protection provided by the equipment may be impaired if this equipment is used in a manner not specified in this manual. A listing of our international affiliates is availble on our Web site: http://www.automationdirect.com WARNING: Providing a safe operating environment for personnel and equipment is your responsibility and should be your primary goal during system planning and installation.
Page 38: Orderly System Shutdown
2–3 Installation, Wiring, and Specifications Orderly System The first level of fault detection is ideally Shutdown the PLC control program, which can identify machine problems. You must analyze your application and identify any shutdown sequences that must be performed. These types of problems are usually things such as jammed parts, etc.
Page 39: Orientation To Dl05 Front Panel
Installation, Wiring, and Specifications Orientation to DL05 Front Panel Most connections, indicators, and labels on the DL05 Micro PLCs are located on its front panel. The communication ports are located on the top side of the PLC. Please refer to the drawing below.
Page 40: Connector Removal
2–5 Installation, Wiring, and Specifications Connector All of the terminals for the DL05 are contained on one connector block. In some Removal instances, it may be desireable to remove the connector block for easy wiring. The connector is designed for easy removal with just a small screwdriver. The drawing below shows the procedure for removal at one end.
Page 41: Mounting Guidelines
Enclosure Selection and Component Dimensions Unit Dimensions The following diagram shows the outside dimensions and mounting hole locations for all versions of the DL05. Make sure you follow the installation guidelines to allow proper spacing from other components. 4.8” 2.6”...
Page 42: Panel Layout & Clearances
DL05 component. Not to Scale 4. The ground terminal on the DL05 base must be connected to a single point ground. Use copper stranded wire to achieve a low impedance. Copper eye lugs should be crimped and soldered to the ends of the stranded wire to ensure good surface contact.
Page 43: Using Mounting Rails
Installation, Wiring, and Specifications 6. A good common ground reference (Earth ground) is essential for proper operation of the DL05. One side of all control and power circuits and the ground lead on flexible shielded cable must be properly connected to Earth ground.
Page 44: Agency Approvals
The following table lists the environmental specifications that generally apply to Specifications DL05 Micro PLCs. The ranges that vary for the Handheld Programmer are noted at the bottom of this chart. Certain output circuit types may have derating curves, depending on the ambient temperature and the number of outputs ON. Please refer to the appropriate section in this chapter pertaining to your particular DL05 PLC.
Page 45: Wiring Guidelines
Installation, Wiring, and Specifications Wiring Guidelines Connect the power input wiring for the DL05. Observe all precautions stated earlier in this manual. For more details on wiring, see Chapter 2 on Installation, Wiring, and Specifications. When the wiring is complete, close the connector covers. Do not apply power at this time.
Page 46: External Power Source
AC failures. Typically, the main bus is fused at a higher level than the branch device, which in this case is the DL05. The recommended fuse size for the branch circuit to the DL05 is 1A (for example, a Littlefuse 312.001 or equivalent).
Page 47: Fuse Protection For Input And Output Circuits
8 or 16, depending on the number of points in an I/O group. For the DL05 the eight inputs use reference numbers X0 – X7. The six output points use references Y0 – Y5.
Page 48: System Wiring Strategies
Discrete Outputs Circuit Isolation Programming Device or Isolation Boundary Operator Interface Boundary The next figure shows the internal layout of DL05 PLCs, as viewed from the front panel. To Programming Device or Operator Interface DL05 2 Comm. Ports Main Power...
Page 49: Connecting Operator Interface Devices
Use cable part no. OP–2CBL Connecting DL05 Micro PLCs can be programmed with either a handheld programmer or with Programming DirectSOFT on a PC. Connect the DL05 to a PC using the cable shown below. Devices RJ12 9-pin D-shell DL05 Micro PLC...
Page 50 By applying the circuit principle above to the four possible combinations of input/output sinking/sourcing types, we have the four circuits as shown below. DL05 Micro PLCs provide all except the sourcing output I/O circuit types.
Page 51: I/O "Common" Terminal Concepts
This is especially important in output circuits, where heavier gauge wire is sometimes necessary on commons. Most DL05 input and output circuits are grouped into banks that share a common return path. The best indication of I/O common grouping is on the wiring label.
Page 52: Connecting Dc I/O To "Solid State" Field Devices
DC circuit, one must be wired as sourcing and the other as sinking. Solid State The DL05’s DC inputs are flexible in that they detect current flow in either direction, so they can be wired as either sourcing or sinking. In the following circuit, a field Input Sensors device has an open-collector NPN transistor output.
Page 53 (in watts), in order to size R properly. pull-up pull-up input (turn–on) input input – 0.7 supply supply – pull-up input pull-up input pullup The drawing below shows the actual wiring of the DL05 Micro PLC to the supply and pull-up resistor. Common Output – Supply...
Page 54: Relay Output Wiring Methods
In the circuit on the following page, loads for Y0 – Y2 use the same AC power supply which powers the DL05 PLC. Loads for Y3 – Y5 use a separate DC supply. In this example, the commons are separated according to which supply powers the...
Page 55: Surge Suppresion For Inductive Loads
2–20 Installation, Wiring, and Specifications Fuse or Line Circuit Ground Breaker – Neutral Output Point Wiring Surge Suppresion Inductive load devices (devices with a coil) generate transient voltages when For Inductive de-energized with a relay contact. When a relay contact is closed it “bounces”, which Loads energizes and de-energizes the coil until the “bouncing”...
Page 56 2–21 Installation, Wiring, and Specifications This figure shows the same circuit with a transorb (TVS) across the coil. Notice that the voltage spike is significantly reduced. +24 VDC +24 VDC –24 VDC –42 VDC Module Relay Contact Use the following table to help select a TVS or MOV suppressor for your application based on the inductive load voltage.
Page 57: Dc Input Wiring Methods
2–22 Installation, Wiring, and Specifications DC Input Wiring DL05 Micro PLCs with DC inputs are particularly PLC DC Input Input Methods flexible because they can be either sinking or sourcing. The dual diodes (shown to the right) allow current to flow in either direction. The inputs accept 10.8 –...
Page 58: Dc Output Wiring Methods
2–23 Installation, Wiring, and Specifications DC Output DL05 DC output circuits are high-performance transistor switches with low Wiring Methods on-resistance and fast switching times. Please note the following characteristics which are unique to the DC output type: There is only one electrical common for all six outputs. All six outputs belong to one bank.
Page 59: High-Speed I/O Wiring Methods
HSIO. While the HSIO circuit has six modes, we show wiring diagrams for two of the most popular modes in this chapter. The high-speed input interfaces to points X0 – X2. Properly configured, the DL05 can count quadrature pulses at up to 5 kHz from an incremental encoder as shown below.
Page 60: Glossary Of Specification Terms
The time the module requires to process an ON to OFF state transition. Status Indicators The LEDs that indicate the ON/OFF status of an input or output point. All LEDs on DL05 Micro PLCs are electrically located on the logic side of the input or output circuit.
Page 61: Wiring Diagrams And Specifications
Wiring Diagrams and Specifications The remainder of this chapter dedicates two pages to each of the eight versions of DL05 Micro PLCs. Each section contains a basic wiring diagram, equivalent I/O circuits, and specification tables. Please refer to the section which describes the particular DL05 version used in your application.
Page 62: D0-05Ar General Specifications
2–27 Installation, Wiring, and Specifications The six relay output channels use terminals on the right side of the connector. Outputs are organized into two banks of three normally-open relay contacts. Each bank has a common terminal. The wiring example on the last page shows all commons connected together, but separate supplies and common circuits may be used.
Page 63: D0-05Dr I/O Wiring Diagram
2–28 Installation, Wiring, and Specifications D0–05DR These micro PLCs feature eight DC inputs and six relay contact outputs. The I/O Wiring Diagram following diagram shows a typical field wiring example. The AC external power connection uses four terminals at the left as shown. Fuse Line C.B.
Page 64: D0-05Dr General Specifications
2–29 Installation, Wiring, and Specifications D0–05DR External Power Requirements 95 – 240 VAC, 30 VA maximum, General Communication Port 1 K–Sequence (Slave) Specifications 9600 baud (Fixed), 8 data bits, 1 stop bit, DirectNET (Slave) odd parity MODBUS (Slave) Communication Port 2 K–Sequence (Slave) 9600 baud (default), 8 data bits, 1 stop bit, DirectNET (Master/Slave)
Page 65: D0-05Ad I/O Wiring Diagram
2–30 Installation, Wiring, and Specifications D0–05AD The D0–05AD Micro PLC features eight AC inputs and six DC outputs. The following I/O Wiring Diagram diagram shows a typical field wiring example. The AC external power connection uses four terminals at the left as shown. Fuse Line C.B.
Page 66: D0-05Ad General Specifications
2–31 Installation, Wiring, and Specifications D0–05AD External Power Requirements 95 – 240 VAC, 30 VA maximum, General Communication Port 1 K–Sequence (Slave) Specifications 9600 baud (Fixed), 8 data bits, 1 stop bit, DirectNET (Slave) odd parity MODBUS (Slave) Communication Port 2 K–Sequence (Slave) 9600 baud (default), 8 data bits, 1 stop bit, DirectNET (Master/Slave)
Page 67: D0-05Dd I/O Wiring Diagram
2–32 Installation, Wiring, and Specifications D0–05DD These micro PLCs feature eight DC inputs and six DC outputs. The following I/O Wiring Diagram diagram shows a typical field wiring example. The AC external power connection uses four terminals at the left as shown. Fuse Line C.B.
Page 68: Dc Input Specifications
2–33 Installation, Wiring, and Specifications D0–05DD External Power Requirements 95 – 240 VAC, 30 VA maximum, General Communication Port 1 K–Sequence (Slave) Specifications 9600 baud (Fixed), 8 data bits, 1 stop bit, DirectNET (Slave) odd parity MODBUS (Slave) Communication Port 2 K–Sequence (Slave) 9600 baud (default), 8 data bits, 1 stop bit, DirectNET (Master/Slave)
Page 69: D0-05Aa I/O Wiring Diagram
2–34 Installation, Wiring, and Specifications D0–05AA The D0–05AA Micro PLC features eight AC inputs and six AC outputs. The following I/O Wiring Diagram diagram shows a typical field wiring example. The AC external power connection uses four terminals at the left as shown. Fuse Line C.B.
Page 70: D0-05Aa General Specifications
2–35 Installation, Wiring, and Specifications D0–05AA External Power Requirements 95 – 240 VAC, 30 VA maximum, General Communication Port 1 K–Sequence (Slave) Specifications 9600 baud (Fixed), 8 data bits, 1 stop bit, DirectNET (Slave) odd parity MODBUS (Slave) Communication Port 2 K–Sequence (Slave) 9600 baud (default), 8 data bits, 1 stop bit, DirectNET (Master/Slave)
Page 71: D0-05Da I/O Wiring Diagram
2–36 Installation, Wiring, and Specifications D0–05DA The D0–05DA Micro PLC features eight DC inputs and six AC outputs. The following I/O Wiring Diagram diagram shows a typical field wiring example. The AC external power connection uses four terminals at the left as shown. Fuse Line C.B.
Page 72: D0-05Da General Specifications
2–37 Installation, Wiring, and Specifications D0–05DA External Power Requirements 95 – 240 VAC, 30 VA maximum, General Communication Port 1 K–Sequence (Slave) Specifications 9600 baud (Fixed), 8 data bits, 1 stop bit, DirectNET (Slave) odd parity MODBUS (Slave) Communication Port 2 K–Sequence (Slave) 9600 baud (default), 8 data bits, 1 stop bit, DirectNET (Master/Slave)
Page 73: D0-05Dr-D I/O Wiring Diagram
2–38 Installation, Wiring, and Specifications D0–05DR–D These micro PLCs feature eight DC inputs and six relay contact outputs. The I/O Wiring Diagram following diagram shows a typical field wiring example. The DC external power connection uses three terminals at the left as shown. –...
Page 74: D0-05Dr-D General Specifications
2–39 Installation, Wiring, and Specifications D0–05DR–D External Power Requirements 12 – 24 VDC, 20 W maximum, General Communication Port 1 K–Sequence (Slave) Specifications 9600 baud (Fixed), 8 data bits, 1 stop bit, DirectNET (Slave) odd parity MODBUS (Slave) Communication Port 2 K–Sequence (Slave) 9600 baud (default), 8 data bits, 1 stop bit, DirectNET (Master/Slave)
Page 75: D0-05Dd-D I/O Wiring Diagram
2–40 Installation, Wiring, and Specifications D0–05DD–D These micro PLCs feature eight DC inputs and six DC outputs. The following I/O Wiring Diagram diagram shows a typical field wiring example. The DC external power connection uses four terminals at the left as shown. –...
Page 76: Dc Input Specifications
2–41 Installation, Wiring, and Specifications D0–05DD–D External Power Requirements 12 – 24 VDC, 20 W maximum, General Communication Port 1 K–Sequence (Slave) Specifications 9600 baud (Fixed), 8 data bits, 1 stop bit, DirectNET (Slave) odd parity MODBUS (Slave) Communication Port 2 K–Sequence (Slave) 9600 baud (default), 8 data bits, 1 stop bit, DirectNET (Master/Slave)
Page 77 50 55 ° 122 131 ° Ambient Temperature (°C/°F) Equivalent circuit Internal module circuitry INPUT To LED Optical Isolator 12–24VDC Configuration shown is current sinking Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
Page 78: D0-16Nd3 Dc Input
Equivalent input circuit Configuration shown is for current sinking Use Ziplink ZL–CBL056 cable and ZL–CM056 connector Note: The DL05 must have firmware version V4.10 module or build your own cables using 24–pin Molex Micro (or later) for this module to function properly.
Page 79: D0-10Td1 Dc Output
200 mA (all pts. on) Base power required (5V) Max. 150 mA (all pts. ON) Derating Chart 50 55 ° 122 131 ° Ambient Temperature (°C/°F) Equivalent circuit Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
Page 80: D0-16Td1 Dc Output
° Ambient Temperature (°C/°F) Equivalent input circuit Note: The DL05 must have firmware version V4.10 Use Ziplink ZL–CBL056 cable and ZL–CM056 connector module or build your own cables using 24–pin Molex Micro (or later) for this module to function properly.
Page 81: D0-10Td2 Dc Output
Fuse Base power required (5V) Max. 150 mA (all pts. ON) Derating Chart 50 55 ° 122 131 ° Ambient Temperature (°C/°F) Equivalent circuit Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
Page 82: D0-16Td2 Dc Output
° Ambient Temperature (°C/°F) Equivalent input circuit Note: The DL05 must have firmware version V4.10 Use Ziplink ZL–CBL056 cable and ZL–CM056 connector module or build your own cables using 24–pin Molex Micro (or later) for this module to function properly.
Page 83: D0-07Cdr Dc Input And Output
122 131 ° 122 131 ° Ambient Temperature (°C/°F) Ambient Temperature (°C/°F) Equivalent input circuit Equivalent output circuit Configuration shown is for current sinking Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
Page 84: D0-08Tr Relay Output
Base power required (5 V) Maximum 280 mA (all pts. ON) Derating Chart 50 55 ° 122 131 ° Ambient Temperature (°C/°F) Equivalent circuit Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
Page 85: D0-08Cdd1 Dc Input And Output
50 55 ° 122 131 ° Ambient Temperature (°C/°F) Ambient Temperature (°C/°F) Equivalent input circuit Equivalent output circuit Configuration shown is for current sinking Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
Page 86: I/O Addressing
Each option module has a set number of I/O points. This holds true for both the and Addressing discrete modules and the analog modules. The following chart shows the number of I/O points per module when used in the DL05 PLC. DC Input Modules I/O Points Slot 1 I/O Address D0–10ND3...
Page 87: Chapter 3: High-Speed Input And Pulse Output Features
High-Speed Input and Pulse Output Features In This Chapter..Introduction Choosing the HSIO Operating Mode Mode 10: High Speed Counter Mode 20: Quadrature Counter Mode 30: Pulse Output Mode 40: High Speed Interrupt Mode 50: Pulse Catch Input Mode 60: Filtered Inputs...
Page 88: Introduction
These applications usually involve some type of motion control, or high-speed interrupts for time-critical events. The DL05 Micro PLC solves this traditionally expensive problem with built-in CPU enhancements. Let’s take a closer look at the available high-speed I/O features.
Page 89: Dedicated High-Speed I/O Circuit
The internal CPU’s main task is to execute the ladder program and read/write all I/O Speed I/O Circuit points during each scan. In order to service high-speed I/O events, the DL05 includes a special circuit which is dedicated to a portion of the I/O points. Refer to the DL05 block diagram in the figure below.
Page 90: Choosing The Hsio Operating Mode
Regular Output Default Mode Mode 60 (Filtered Inputs) is the default mode. The DL05 is initialized to this mode at the factory, and any time you reset V-memory scratchpad. In the default condition, X0–X2 are filtered inputs (10 mS delay) and Y0–Y1 are standard outputs.
Page 91: Configuring The Hsio Mode
Bits 0 – 7 define the mode number 00, 10.. 60 previously referenced in this chapter. The example data “2050” shown selects Mode 50 – Pulse Catch (BCD = 50). The DL05 PLC ignores bits 8 - 15 in V7633. Configuring...
Page 92: Mode 10: High-Speed Counter
“clock” input for the high-speed counter, incrementing it upon each off-to-on transition. The external reset input on X2 is the default configuration for Mode 10. Input X1 is the filtered input, available to the ladder program. DL05 Output Circuit Y0, Y1 Y2 - Y5...
Page 93: Wiring Diagram
Signal Common 12 24 VDC Supply Interfacing to The DL05’s DC inputs are flexible in that they detect current flow in either direction, Counter Outputs so they can be wired to a counter with either sourcing or sinking outputs. In the following circuit, a counter has open-collector NPN transistor outputs.
Page 94: Setup For Mode 10
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use BCD 10 in the lower byte of V7633 to select the High-Speed Counter Mode. The DL05 does not use bits 8 - 15 in V7633. Memory Location V7633...
Page 95: Preset Data Starting Location
3–9 High-Speed Input and Pulse Output Features Preset Table Pointer Preset Data V7630 is a pointer location which points to Starting Location the beginning of the Preset Data Table. V7630 2000 The default starting location for the Preset Data Table is V2320 (default after Preset Data initializing scratchpad...
Page 96: Calculating Your Preset Values
3–10 High-speed Input and Pulse Output Features Calculating Your The preset values occupy two data words each. They can range in value from 0000 Preset Values 0000 to 9999 9999, just like the high-speed counter value. All 24 values are absolute values, meaning that each one is an offset from the counter zero value.
Page 97: Writing Your Control Program
DL05 has a faster reset time. Writing Your You may recall that the counter instruction is a standard instruction in the DL05 Control Program instruction set. Refer to the figure below. The mnemonic for the counter is UDC (up-down counter).The DL05 can have up to 128 counters, labeled CT0 through...
Page 98: Program Example: Counter Without Preset
3–12 High-speed Input and Pulse Output Features The next figure shows how the HSIO counter will appear in a ladder program. Note that the Enable Interrupt (ENI) command must execute before the counter value reaches the first preset value. We do this at powerup by using the first scan relay. When using the counter but not the presets and interrupt, we can omit the ENI.
Page 99: Program Example Cont'd
3–13 High-Speed Input and Pulse Output Features Program DirectSOFT Example Cont’d First Scan Only Load constant K10 into the accumulator. This selects Mode 10 as the HSIO mode. Output the constant K10 to V7633, the Mode 10 location of HSIO Mode select register. V7633 Load the constant required to configure X0 as the counter clock.
Page 100: Counter With Presets Program Example
This example program shows how to control the lathe cutter head to make three grooves in the work-piece at precise positions. When the lead screw turns, the counter device generates pulses which the DL05 can count. The three preset variables A, B, and C represent the positions (number of pulses) corresponding to each of the three grooves.
Page 101 3–15 High-Speed Input and Pulse Output Features Load the preset C value into the accumulator. K4850 Output the accumulator contents to the memory OUTD location for preset 3. V2324 Load the constant Kffff into the accumulator. This value represents the end of the preset list. Kffff Output the accumulator contents to the memory OUTD...
Page 102: Counter With Preload Program Example
3–16 High-speed Input and Pulse Output Features Counter With The following example shows how you can preload the current count with another Preload value. When the preload command input (X4 in this example) is energized, we Program Example disable the counter from counting with C0. Then we write the value K3000 to the count register (V1076-V1077).
Page 103: Troubleshooting Guide For Mode 10
3–17 High-Speed Input and Pulse Output Features Troubleshooting If you’re having trouble with Mode 10 operation, please study the following Guide for Mode 10 symptoms and possible causes. The most common problems are listed below. Symptom: The counter does not count. Possible causes: 1.
Page 104: Mode 20: Quadrature Counter
Input X0 is dedicated to the Phase A quadrature signal, and input X1 receives Phase B signal. X2 is dedicated to reset the counter to zero value when energized. DL05 Output Circuit Y0, Y1 Y2 - Y5...
Page 105: Wiring Diagram
High-Speed Input and Pulse Output Features Wiring Diagram A general wiring diagram for encoders to the DL05 in HSIO Mode 20 is shown below. Encoders with sinking outputs (NPN open collector) are probably the best choice for interfacing. If the encoder sources to the inputs, it must output 12 to 24 VDC. Note that encoders with 5V sourcing outputs will not work with DL05 inputs.
Page 106: Setup For Mode 20
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use BCD 20 in the lower byte of V7633 to select the High-Speed Counter Mode. The DL05 does not use bits 8 - 15 in V7633. Memory Location V7633...
Page 107: Writing Your Control Program
3–21 High-Speed Input and Pulse Output Features Writing Your You may recall that the Up-Down counter instruction is standard in the DL05 Control Program instruction set. Refer to the figure below. The mnemonic for the counter is UDC (up-down counter).The DL05 can have up to 128 counters, labeled CT0 through CT177.
Page 108: Program Example Cont'd
3–22 High-speed Input and Pulse Output Features Program DirectSOFT Example Cont’d Load constant K20 into the accumulator. This selects Mode 20 as the HSIO mode. Output this address to V7633, the location of the HSIO Select Mode 20 Mode select register. V7633 Load the constant required to configure X0 as Phase A input.
Page 109: Counter Preload Program Example
3–23 High-Speed Input and Pulse Output Features Counter Preload When the preload request is made, the user turns on X4. First we disable counting by resetting C0, Program Example the counter’s enable input. Load the BCD value K3000 into the Preload counter accumulator.
Page 110: Mode 30: Pulse Output
By programming acceleration and deceleration values, position and velocity target values, the HSIO function automatically calculates the entire motion profile. The figure below shows the DL05 generating pulse and direction signals to the drive amplifier of a stepper positioning system. The pulses accomplish the profile independently and without interruption to ladder program execution in the CPU.
Page 111: Functional Block Diagram
HSIO Mode register V7633 contains a BCD “30”, the pulse output capability in the HSIO circuit is enabled. The pulse outputs use Y0 and Y1 terminals on the output connector. Remember that the outputs can only be DC type to operate. Output Circuit DL05 Y2 - Y5 (Pulse / CW) (Direction / CCW)
Page 112: Wiring Diagram
The pulse signals from Y0 and Y1 outputs will typically go to drive input circuits as Drive Inputs shown above. Remember that the DL05’s DC outputs are sinking-only. It will be helpful to locate equivalent circuit schematics of the drive amplifier. The following diagram shows how to interface to a sourcing drive input circuit.
Page 113: Motion Profile Specifications
3–27 High-Speed Input and Pulse Output Features Motion Profile The motion control profiles generated in Pulse Output Mode have the following Specifications specifications: Parameter Specification Profiles Trapezoidal – Accel Slope / Target Velocity / Decel Slope Registration – Velocity to Position Control on Interrupt Velocity Control –...
Page 114: Setup For Mode 30
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use BCD 30 in the lower byte of V7633 to select the High-Speed Counter Mode. The DL05 does not use bits 8 - 15 in V7633. Memory Location V7633...
Page 115: Profile Parameter Table
3–29 High-Speed Input and Pulse Output Features Profile Table Pointer Profile V7630 is a pointer location which points to Parameter Table the beginning of the Profile Parameter V7630 2320 Table. The default starting location for the profile parameter table V2320. Profile Parameter Table However, you may change this by V2320...
Page 116: Choosing The Profile Type
3–30 High-speed Input and Pulse Output Features Choosing the Pulse Output Mode generates three types of motion profiles. Most applications use Profile Type one type for most moves. However, each move can be different if required. Trapezoidal – Accel Slope to Target Velocity to Decel Slope Registration –...
Page 117: Trapezoidal Profile Operation
3–31 High-Speed Input and Pulse Output Features Trapezoidal Profile Operation Trapezoidal Profile The trapezoidal profile is best suited for simple point-to-point moves, when the target Applications position is known in advance. Starting velocities must be within the range of 40 pps to 1k pps.
Page 118: Trapezoidal Profile Program Example
3–32 High-speed Input and Pulse Output Features Trapezoidal Profile The trapezoidal profile we want to perform is drawn and labeled in the following Program Example figure. It consists of a non-zero starting velocity, and moderate target velocity. Trapezoidal Profile Velocity Target Velocity = 1 kHz Accel = 2 sec Decel = 4 sec...
Page 119: Program Example Cont'd
3–33 High-Speed Input and Pulse Output Features Program Example Cont’d Load the constant K100 which is required to select Trapzoidal Profile, absolute positioning, and a target K100 velocity of 1 kHz. Profile / Target Output this constant to V2320, the location of the Profile Select / Starting Velocity setup register.
Page 120: Registration Profile Operation
3–34 High-speed Input and Pulse Output Features Registration Profile Operation Registration In a typical application shown to the Applications right, product material in work moves past a work tool such as a drill. Registration Scrap marks on the scrap area of the work-piece Finished part area Area allow a machine tool to register its position...
Page 121: Registration Profile Program Example
3–35 High-Speed Input and Pulse Output Features Registration Profile The registration profile we want to perform is drawn and labeled in the following Program Example figure. It consists of a non-zero starting velocity, and moderate target velocity. Registration Profile Velocity Target Velocity = 1 kHz Accel = 2 sec Decel = 4 sec...
Page 122: Program Example Cont'd
3–36 High-speed Input and Pulse Output Features Program Example Cont’d Load the constant K9100 which is required to select Registration Profile, relative positioning, and a target K9100 velocity of 1 kHz (9xxx times 10 pps). Profile / Target Output this constant to V2320, the location of the Profile Select / Starting Velocity setup register.
Page 123: Home Search Program Example
3–37 High-Speed Input and Pulse Output Features Home Search One of the more challenging aspects of motion control is the establishment of actual Program Example position at powerup. This is especially true for open-loop systems which do not have a position feedback device. However, a simple limit switch located at an exact location on the positioning mechanism can provide “position feedback”...
Page 124 3–38 High-speed Input and Pulse Output Features Profile / Target Velocity Add a timer to Select Registration Profile, create a slight relative positioning, and a K9100 delay before target velocity of 1000 pps reversing motor. (9xxx times 10 pps). V2320 CCW delay done.
Page 125: Velocity Profile Operation
3–39 High-Speed Input and Pulse Output Features Velocity Profile Operation Velocity Profile The velocity profile is best suited for applications which involve motion but do not Applications require moves to specific points. Conveyor speed control is a typical example. Velocity Profile Velocity Time Start...
Page 126: Velocity Profile Program Example
3–40 High-speed Input and Pulse Output Features Velocity Profile The velocity profile we want to perform is drawn and labeled in the following figure. Program Example Each velocity segment is of indefinite length. The velocity only changes when ladder logic (or other device writing to V-memory) updates the velocity parameter. Velocity Profile Velocity Time...
Page 127: Program Example Cont'd
3–41 High-Speed Input and Pulse Output Features Program Example Cont’d Load the constant K2000 which is required to select Velocity Profile. This data word contains no velocity K2000 information in the case of velocity mode. Profile / Target Output this constant to V2320, the location of the Profile Select setup register.
Page 128: Pulse Output Error Codes
3–42 High-speed Input and Pulse Output Features Pulse Output Error The Profile Parameter Table starting at V2320 (default location) defines the profile. Codes Certain numbers will result in a error when the HSIO attempts to use the parameters to execute a move profile. When an error occurs, the HSIO writes an error code in V2326.
Page 129 3–43 High-Speed Input and Pulse Output Features 4. Wiring – Verify the wiring to the stepper motor is correct. Remember the signal ground connection from the PLC to the motion system is required. 5. Motion system – Verify that the drive is powered and enabled. To verify the motion system is working, you can use Mode 60 operation (normal PLC inputs/outputs) as shown in the test program below.
Page 130: Mode 40: High-Speed Interrupts
The HSIO circuit creates the high-speed interrupt to the CPU. The following diagram shows the external interrupt option, which uses X0. In this configuration X1 and X2 Diagram are normal filtered inputs. DL05 Output Circuit Y0, Y1 Y2 - Y5...
Page 131: Setup For Mode 40
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use BCD 40 in the lower byte of V7633 to select the High-Speed Counter Mode. The DL05 does not use bits 8 - 15 in V7633. Memory Location V7633...
Page 132: External Interrupt Timing Parameters
3–46 High-speed Input and Pulse Output Features External Interrupt Signal pulses at X0 must meet certain timing criteria to guarantee an interrupt will Timing Parameters result. Refer to the timing diagram below. The input characteristics of X0 are fixed (it is not a programmable filtered input).
Page 133: External Interrupt Program Example
3–47 High-Speed Input and Pulse Output Features External Interrupt The following program selects Mode 40, then selects the external interrupt option. Program Example Inputs X1 and X2 are configured as filtered inputs with a 10 mS time constant. The program is otherwise generic, and may be adapted to your application. DirectSOFT Load constant K40 into the accumulator.
Page 134: Timed Interrupt Program Example
3–48 High-speed Input and Pulse Output Features Timed Interrupt The following program selects Mode 40, then selects the timed interrupt option, with Program Example an interrupt period of 100 mS. 100 mS Timed Interrupt Time Inputs X0, X1, and X2, are configured as filtered inputs with a 10 mS time constant. Note that X0 uses the time constant from X1.
Page 135: Mode 50: Pulse Catch Input
The HSIO resets the latch at the end of the next CPU scan. Inputs X1 and X2 are available as filtered discrete inputs. DL05 Output Circuit Y0, Y1...
Page 136: Setup For Mode 50
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use BCD 50 in the lower byte of V7633 to select the High-Speed Counter Mode. The DL05 does not use bits 8 - 15 in V7633. Memory Location V7633...
Page 137: Pulse Catch Program Example
3–51 High-Speed Input and Pulse Output Features Pulse Catch The following program selects Mode 50, then programs the pulse catch code for X0. Program Example Inputs X1 and X2 are configured as filtered inputs with 10 and 30 mS time constants respectively.
Page 138: Mode 60: Discrete Inputs With Filter
BCD “60”, the input filter in the HSIO circuit is enabled. Each input X0 through X2 has its own filter time constant. The filter circuit assigns the outputs of the filters as logical references X0 through X2. DL05 Output Circuit Y0, Y1...
Page 139: Setup For Mode 60
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use BCD 60 in the lower byte of V7633 to select the High-Speed Counter Mode. The DL05 does not use bits 8 - 15 in V7633. Memory Location V7633...
Page 140: Filtered Inputs Program Example
3–54 High-speed Input and Pulse Output Features Filtered Inputs The following program selects Mode 60, then programs the filter delay time Program Example constants for inputs X0, X1, and X2. Each filter time constant is different, for illustration purposes. The program is otherwise generic, and may be adapted to your application.
Page 141: Chapter 4: Cpu Specifications And Operation
— I/O Response Time — CPU Scan Time Considerations — PLC Numbering Systems — Memory Map — DL05 System V-Memory — X Input Bit Map — Y Output Bit Map — Staget Control / Status Bit Map — Control Relay Bit Map —...
Page 142 Commons NOTE: The High-Speed I/O function (HSIO) consists of dedicated but configurable hardware in the DL05. It is not considered part of the CPU, because it does not execute the ladder program. For more on HSIO operation, see Chapter 3.
Page 143 4–3 CPU Specifications and Operation CPU Specifications Feature DL05 Total Program memory (words) Ladder memory (words) 2048 Total V-memory (words) 4096 User V-memory (words) 3968 Non-volatile V Memory (words) Contact execution (boolean) 2.0uS Typical scan (boolean) 2.7–3.2mS RLL Ladder style Programming...
Page 144: Cpu Hardware Setup
Cables are available that allow you to quickly and easily connect a Handheld Port Pinout Programmer or a personal computer to the DL05 PLCs. However, if you need to build your own cables, use the pinout diagrams shown. The DL05 PLCs require an Diagrams RJ-12 phone plug to fit the built-in jacks.
Page 145: Connecting The Programming Devices
If you’re using a Personal Computer with the DirectSOFT programming package, Programming you can connect the computer to either of the DL05’s programming ports. For an Devices engineering office environment (typical during program development), this is the preferred method of programming.
Page 146: Status Indicators
Data is being received by the CPU - Port 2 No data is being received by the CPU - Port 2 The mode switch on the DL05 PLC provides positions for enabling and disabling Mode Switch program changes in the CPU. Unless the mode switch is in the TERM position, RUN...
Page 147: Changing Modes In The Dl05 Plc
MODE Menu Options Mode of Operation The DL05 CPU will normally power-up in the mode that it was in just prior to the at Power-up power interruption. For example, if the CPU was in Program Mode when the power was disconnected, the CPU will power-up in Program Mode (see warning note below).
Page 148: Auxiliary Functions
AUX 24 — Clear all Ladders AUX 31 — Clear V Memory Initializing System The DL05 Micro PLC maintain system parameters in a memory area often referred to as the “scratchpad”. In some cases, you may make changes to the system setup Memory that will be stored in system memory.
Page 149: Setting Retentive Memory Ranges
Make sure you that you have considered all ramifications of this operation before you select it. Setting Retentive The DL05 PLCs provide certain ranges of retentive memory by default. The default Memory Ranges ranges are suitable for many applications, but you can change them if your application requires additional retentive ranges or no retentive ranges at all.
Page 150: Using A Password
CPU Specifications and Operation Using a Password The DL05 PLCs allow you to use a password to help minimize the risk of unauthorized program and/or data changes. Once you enter a password you can “lock” the PLC against access. Once the CPU is locked you must enter the password before you can use a programming device to change any system parameters.
Page 151: Cpu Operation
CPU Operation Achieving the proper control for your equipment or process requires a good understanding of how DL05 CPUs control all aspects of system operation. There are four main areas to understand before you create your application program: CPU Operating System — the CPU manages all aspects of system control.
Page 152: Program Mode
4–12 CPU Specifications and Operation Program Mode In Program Mode, the CPU does not execute the application program or update the output points. The primary use for Program Mode is to enter or change an application program. also program mode to set up the CPU parameters, such as HSIO features, retentive memory areas, etc.
Page 153: Read Inputs
For example, it would read a programming device to see if any input, output, or other memory type status needs to be modified. There are two basic types of forcing available with the DL05 CPUs. Forcing from a peripheral – not a permanent force, good only for one scan Bit Override –...
Page 154: Update Special Relays And Special Registers
4–14 CPU Specifications and Operation Input Update Input Update X128 Bit Override OFF Bit Override ON Force from Y128 Force from Programmer Programmer C377 Result of Program Result of Program Image Register (example) Solution Solution WARNING: Only authorized personnel fully familiar with all aspects of the application should make changes to the program.
Page 155: Write Outputs
Probably one of the more important things that occurs during this segment is the scan time calculation and watchdog timer control. The DL05 CPU has a “watchdog” timer that stores the maximum time allowed for the CPU to complete the solve application segment of the scan cycle.
Page 156: Normal Maximum I/O Response
4–16 CPU Specifications and Operation Scan Solve Solve Solve Solve Scan Program Program Program Program Read Write Inputs Outputs Field Input CPU Reads CPU Writes Inputs Outputs Input Off/On Delay Output Off/On Delay I/O Response Time In this case, you can calculate the response time by simply adding the following items: Input Delay + Scan Time + Output Delay = Response Time Normal Maximum...
Page 157: Improving Response Time
4–17 CPU Specifications and Operation Improving There are a few things you can do the help improve throughput. Response Time You can choose instructions with faster execution times You can use immediate I/O instructions (which update the I/O points during the program execution) You can use the HSIO Mode 50 Pulse Catch features designed to operate in high-speed environments.
Page 158: Cpu Scan Time Considerations
4–18 CPU Specifications and Operation CPU Scan Time Considerations The scan time covers all the cyclical tasks Power up that are performed by the operating  system. You can use DirectSOFT or the Initialize hardware Handheld Programmer to display the minimum, maximum, and current scan Initialize various memory times that have occurred since the...
Page 159: Application Program Execution
Just add the execution times for all the instructions in your program to determine to total execution time. Appendix C provides a complete list of the instruction execution times for the DL05 Micro PLC. For example, the execution time for running the program shown below is calculated as follows:...
Page 160: Plc Numbering Systems
4–20 CPU Specifications and Operation PLC Numbering Systems If you are a new PLC user or are using octal binary PLCDirect PLCs for the first time, please 1482 take a moment to study how our PLCs use 0402 numbers. You’ll find that each PLC ASCII manufacturer has their own conventions –961428...
Page 161: V-Memory
4–21 CPU Specifications and Operation V–Memory Variable memory (called “V-memory”) stores data for the ladder program and for configuration settings. V-memory locations and V-memory addresses are the same thing, and are numbered in octal. For example, V2073 is a valid location, while V1983 is not valid (“9”...
Page 162: Memory Map
For example, you need to know how the system identifies input points, output points, data words, etc. The following paragraphs discuss the various memory types used in DL05 Micro PLCs. A memory map overview for the CPU follows the memory descriptions.
Page 163: Input Points (X Data Type)
The discrete input points are noted by an (X Data Type) X data type. There are 8 discrete input points and 256 discrete input addresses available with DL05 CPUs. In this example, the output point Y0 will be turned on when input X0 energizes. Output Points...
Page 164: Timer Current Values (V Data Type)
4–24 CPU Specifications and Operation Timer Current As mentioned earlier, some information Values is automatically stored in V memory. This K1000 (V Data Type) is true for the current values associated with timers. For example, V0 holds the current value for Timer 0, V1 holds the current value for Timer 1, etc.
Page 165: Word Memory (V Data Type)
4–25 CPU Specifications and Operation Word Memory Word memory is referred to as V memory (V Data Type) (variable) and is a 16-bit location normally used manipulate K1345 data/numbers, store data/numbers, etc. Some information is automatically stored V2000 in V memory. For example, the timer current values are stored in V memory.
Page 166: Dl05 System V-Memory
4–26 CPU Specifications and Operation DL05 System V-memory System Parameters The DL05 PLCs reserve several V-memory locations for storing system parameters and Default Data or certain types of system data. These memory locations store things like the error Locations codes, High-Speed I/O data, and other types of system setup information.
Page 167 4–27 CPU Specifications and Operation System Description of Contents Default Values / Ranges V-memory V7657 Port 2: Setup completion code used to notify the completion of the parameter Default: 0A00 setup. V7660 Scan control setup: Keeps the scan control mode. Default: 0000 V7661 Setup timer over counter: Counts the times the actual scan time exceeds the...
Page 168: Dl05 Memory Map
V41000 – V41017 S 001 System None V7600 – V7777 None specific, used for various parameters purposes 1 – The DL05 systems are limited to 8 discrete inputs and 6 discrete outputs with the present available hardware, but 256 point addresses exist.
Page 169: Input Bit Map
X Input Bit Map This table provides a listing of individual Input points associated with each V-memory address bit for the DL05’s eight physical inputs. Actual available references are X0 to X377 (V40400 – V40417). DL05 Input (X) Points Address Address –...
Page 170: Control Relay Bit Map
4–30 CPU Specifications and Operation Control Relay Bit Map This table provides a listing of the individual control relays associated with each V-memory address bit. DL05 Control Relays (C) Address Address V40600 V40601 V40602 V40603 V40604 V40605 V40606 V40607 V40610...
Page 171: Timer Status Bit Map
4–31 CPU Specifications and Operation Timer Status Bit Map This table provides a listing of individual timer contacts associated with each V-memory address bit. DL05 Timer (T) Contacts Address Address V41100 V41101 V41102 V41103 V41104 V41105 V41106 V41107 Counter Status Bit Map This table provides a listing of individual counter contacts associated with each V-memory address bit.
Page 172: Network Configuration And Connections
This section describes how to configure the CPU’s built-in networking ports for either the DL05’s MODBUS or DirectNET. This will allow you to connect the DL05 PLC system directly Comm Ports to MODBUS networks using the RTU protocol, or to other devices on a DirectNET network.
Page 173: Networking Pc To Dl05S
RXD+ TXD+ RTS 5 5 5V RTS 5 FA–ISONET Note: When using the DL05 on a multi-drop network, the RTS ON Delay time must be set to at least 5ms and the RTS OFF Delay time F2–UNICON DL05 PORT 2 must be set to at least 2ms.
Page 174: Modbus Port Configuration
RTS ON / OFF Delay Time: The RTS ON Delay Time specifies the time the DL05 waits to send the data after it has raised the RTS signal line. The RTS OFF Delay Time specifies the time the DL05 waits to release the RTS signal line after the data has been sent.
Page 175: Directnet Port Configuration
RTS ON / OFF Delay Time: The RTS ON Delay Time specifies the time the DL05 waits to send the data after it has raised the RTS signal line. The RTS OFF Delay Time specifies the time the DL05 waits to release the RTS signal line after the data has been sent.
Page 176: Network Slave Operation
MODBUS Function The MODBUS function code determines whether the access is a read or a write, and Codes Supported whether to access a single data point or a group of them. The DL05 supports the MODBUS function codes described below. MODBUS...
Page 177: If Your Host Software Requires The Data Type And Address
In either case, you basically convert the PLC octal address to decimal and add the appropriate MODBUS address (if required). The table below shows the exact equation used for each group of data. DL05 Memory Type PLC Range MODBUS MODBUS (Dec.)
Page 178: Example 1: V2100
4–38 CPU Specifications and Operation The following examples show how to generate the MODBUS address and data type for hosts which require this format. Find the MODBUS address for User V PLC Address (Dec.) + Data Type Example 1: V2100 location V2100.
Page 179: If Your Modbus Host Software Requires An Address Only
In either case, you basically convert the PLC octal address to decimal and add the appropriate MODBUS addresses (as required). The table below shows the exact equation used for each group of data. DL05 Memory Type PLC Range MODBUS 484 Mode...
Page 180: Example 1: V2100 584/984 Mode
4–40 CPU Specifications and Operation The following examples show how to generate the MODBUS addresses for hosts which require this format. Find the MODBUS address for User V PLC Address (Dec.) + Mode Address Example 1: V2100 location V2100. 584/984 Mode V2100 = 1088 decimal 1.
Page 181: Network Master Operation
Slave #3 Master When using the DL05 PLC as the master station, simple RLL instructions are used to initiate the requests. The WX instruction initiates network write operations, and the RX instruction initiates network read operations. Before executing either the WX or RX commands, we will need to load data related to the read or write operation onto the CPU’s accumulator stack.
Page 182: Step 1: Identify Master Port # And Slave
The number of bytes specified also depends on the type of data you want to obtain. For example, the DL05 Input points can be accessed by V-memory locations or as X input locations. However, if you only want X0 – X27, you’ll have to use the X input data type because the V-memory locations can only be accessed in 2-byte increments.
Page 183: Step 3: Specify Master Memory Area
DirectNET slaves – specify the same address in the WX and RX instruction as the slave’s native I/O address MODBUS DL405, DL205, or DL05 slaves – specify the same address in the WX and RX instruction as the slave’s native I/O address MODBUS 305 slaves –...
Page 184: Communications From A Ladder Program
4–44 CPU Specifications and Operation Communications Typically network communications will SP117 from a last longer than 1 scan. The program must Ladder Program wait for the communications to finish before starting the next transaction. SP116 KF201 Port Communication Error Port Busy K0003 O40600 Port 2, which can be a master, has two Special Relay contacts associated with it (see...
Page 185: Chapter 5: Standard Rll Instructions
Standard RLL Instructions In This Chapter..Boolean Instructions Comparative Boolean Immediate Instructions Timer, Counter and Shift Register Instructions Accumulator / Stack Load and Output Data Instructions Logical Instructions (Accumulator) Math Instructions Bit Operation Instructions (Accumulator) Number Conversion Instructions (Accumulator) Table Instructions CPU Control Instructions Program Control Instructions...
Page 186: Introduction
Standard RLL Instructions Introduction DL05 Micro PLCs offer a wide variety of instructions to perform many different types of operations. This chapter shows you how to use each standard Relay Ladder Logic (RLL) instruction. In addition to these instructions, you may also need to refer to the Drum instruction in Chapter 6, or the Stage programming instructions in Chapter 7.
Page 187 5–3 Instruction Set Instruction Page Instruction Page Instruction Page SHFL 5–77 STRND 5–15 5–31 SHFR 5–79 STRNE 5–20 TMRA 5–33 5–42 STRNI 5–26 TMRAF 5–33 STOP 5–94 STRPD 5–15 TMRF 5–31 5–9, 5–23 5–65 5–40 STRE 5–20 SUBB 5–74 5–115 STRI 5–26 SUBD...
Page 188: Using Boolean Instructions
END Statement All DL05 programs require an END statement as the last instruction. This tells the CPU that this is the end of the program. Normally, any instructions placed after the END statement will not be executed. There are exceptions to this such as interrupt routines, etc.
Page 189: Contacts In Series
5–5 Standard RLL Instructions Boolean Instructions Contacts in Series Use the AND instruction to join two or more contacts in series. The following example shows two contacts in series and a single output coil. The instructions used would be STR X0, AND X1, followed by OUT Y0. DirectSOFT Example Handheld Mnemonics STR X0...
Page 190: Joining Series Branches In Parallel
Some of them require you to move the data all over the place before you can actually perform the comparison. The DL05 Micro PLCs provide Comparative Boolean instructions that allow you to quickly and easily solve this problem. The Comparative Boolean provides evaluation of two 4-digit values using boolean contacts.
Page 191: Boolean Stack
There are limits to how many elements you can include in a rung. This is because the DL05 PLCs use an 8-level boolean stack to evaluate the various logic elements. The boolean stack is a temporary storage area that solves the logic for the rung. Each time the program encounters a STR instruction, the instruction is placed on the top of the stack.
Page 192: Immediate Boolean
Boolean Instructions Immediate Boolean The DL05 Micro PLCs can usually complete an operation cycle in a matter of milliseconds. However, in some applications you may not be able to wait a few milliseconds until the next I/O update occurs. The DL05 PLCs offer Immediate input...
Page 193: Boolean Instructions
Aaaa with a normally closed contact. Status of the contact will be opposite the state of the associated image register point or memory location. Operand Data Type DL05 Range Inputs 0–377 Outputs 0–377 Control Relays 0–777 Stage 0–377...
Page 194: Or (Or)
The status of Aaaa the contact will be opposite the state of the associated image register point or memory location. Operand Data Type DL05 Range Inputs 0–377 Outputs 0–377 Control Relays 0–777 Stage 0–377...
Page 195: And (And)
Aaaa another contact in a rung. The status of the contact will be opposite the state of the associated image register point or memory location. Operand Data Type DL05 Range Inputs 0–377 Outputs 0–377 Control Relays 0–777 Stage 0–377...
Page 196: And Store (And Str)
5–12 Standard RLL Instructions Boolean Instructions And Store The And Store instruction logically ands (AND STR) two branches of a rung in series. Both branches must begin with the Store Á À instruction. Or Store The Or Store instruction logically ors two À...
Page 197: Out (Out)
Multiple Out instructions referencing the same discrete location should not be used since only the last Out instruction in the program will control the physical output point. Instead, use the next instruction, the Or Out. Operand Data Type DL05 Range Inputs 0–377 Outputs 0–377...
Page 198: Not (Not)
When the A aaa (PD) input logic produces an off to on transition, the output will energize for one CPU scan. Operand Data Type DL05 Range Inputs 0–377 Outputs 0–377 Control Relays 0–777 In the following example, every time X1 makes an off to on transition, C0 will energize for one scan.
Page 199: Store Positive Differential (Strpd)
On-to-Off transition. Thereafter, the contact remains open until the next On-to-Off transition (the symbol inside the contact represents the transition). Operand Data Type DL05 Range Inputs 0–377 Outputs 0–377 Control Relays 0–777 Stage 0–377 Timer 0–177...
Page 200: Or Positive Differential (Orpd)
Aaaa associated image register point makes an On-to-Off transition, closing it for one CPU scan. Thereafter, it remains open until another On-to-Off transition. Operand Data Type DL05 Range Inputs 0–377 Outputs 0–377 Control Relays 0–777 Stage 0–377...
Page 201: And Positive Differential (Andpd)
On-to-Off transition, closing it for one CPU scan. Thereafter, it remains open until another On-to-Off transition. Operand Data Type DL05 Range Inputs 0–377 Outputs 0–377 Control Relays 0–777...
Page 202: Set (Set)
A aaa range image registers points/memory locations. Once the point/location is reset it is not necessary for the input to remain on. Operand Data Type DL05 Range Inputs 0–377 Outputs 0–377 Control Relays 0–777 Stage 0–377 Timer 0–177...
Page 203: Pause (Pause)
Pause instruction will be turned off at the output points. Operand Data Type DL05 Range Outputs 0–377 In the following example, when X1 is ON, Y3–Y5 will be turned OFF. The execution of the ladder program will not be affected.
Page 204: Comparative Boolean
V aaa B bbb with a normally closed comparative contact. The contact will be on when Vaaa Bbbb. Operand Data Type DL05 Range V memory All (See page 4–28) All (See page 4–28) Pointer All (See page 4–28) All (See page 4–28) Constant ––...
Page 205: Or If Equal (Ore)
The contact will be on when Vaaa Bbbb. B bbb V aaa Operand Data Type DL05 Range V memory All (See page 4–28) All (See page 4–28) Pointer All (See page 4–28) All (See page 4–28)
Page 206: And If Equal (Ande)
B bbb V aaa series with another contact. The contact will be on when Vaaa Bbbb Operand Data Type DL05 Range V memory All (See page 4–28) All (See page 4–28) Pointer All (See page 4–28) All (See page 4–28)
Page 207: Store (Str)
The contact will be on when Aaaa < Bbbb. Operand Data Type DL05 Range V memory All (See page 4–28) All (See page 4–28) Pointer All (See page 4–28) All (See page 4–28) Constant ––...
Page 208: Or (Or)
The contact will be on when Aaaa < Bbbb. A aaa B bbb Operand Data Type DL05 Range V memory All (See page 4–28) All (See page 4–28) Pointer All (See page 4–28) All (See page 4–28)
Page 209: And (And)
A aaa B bbb contact in parallel with another contact. The contact will be on when Aaaa < Bbbb. Operand Data Type DL05 Range V memory All (See page 4–28) All (See page 4–28) Pointer All (See page 4–28) All (See page 4–28) Constant ––...
Page 210: Immediate Instructions
The image register is not updated. Operand Data Type DL05 Range Inputs 0–377 In the following example, when X1 is on, Y2 will energize. DirectSOFT...
Page 211: Or Immediate Instructions Cont'd
5–27 Standard RLL Instructions Immediate Instructions OR Immediate Operand Data Type DL05 Range Instructions Cont’d Inputs 0–377 In the following example, when X1 or X2 is on, Y5 will energize. DirectSOFT Handheld Programmer Keystrokes SHFT In the following example, when X1 is on or X2 is off, Y5 will energize.
Page 212: Out Immediate (Outi)
Operand Data Type DL05 Range Outputs 0–377 In the following example, when X1 is on, output point Y2 on the output module will turn on.
Page 213: Set Immediate (Seti)
Once the outputs are reset it is not necessary for the input to remain on. Operand Data Type DL05 Range Outputs 0–377 In the following example, when X1 is on, Y2 through Y5 will be set on in the image register and on the corresponding output points.
Page 214: Timer, Counter And Shift Register Instructions
5–30 Standard RLL Instructions Timer, Counter, and Shift Register Instructions Timer, Counter and Shift Register Instructions Using Timers Timers are used to time an event for a desired length of time. The single input timer will time as long as the input is on. When the input changes from on to off the timer current value is reset to 0.
Page 215 NOTE: Timer preset constants (K) may be changed by using a handheld programmer, even when the CPU is in Run Mode. Therefore, a V-memory preset is required only if the ladder program must change the preset. Operand Data Type DL05 Range Timers 0–177 ––...
Page 216: Timer Example Using Discrete Status Bits
5–32 Standard RLL Instructions Timer, Counter, and Shift Register Instructions Timer Example In the following example, a single input timer is used with a preset of 3 seconds. The Using Discrete timer discrete status bit (T2) will turn on when the timer has timed for 3 seconds. The Status Bits timer is reset when X1 turns off, turning the discrete status bit off and resetting the timer current value to 0.
Page 217 NOTE: The accumulating type timer uses two consecutive V-memory locations for the 8-digit value, and therefore two consecutive timer locations. For example, if TMR 1 is used, the next available timer number is TMR 3. Operand Data Type DL05 Range Timers 0–176 ––...
Page 218: Accumulating Timer Example Using Discrete Status Bits
5–34 Standard RLL Instructions Timer, Counter, and Shift Register Instructions Accumulating In the following example, a two input timer (accumulating timer) is used with a preset Timer Example of 3 seconds. The timer discrete status bit (T6) will turn on when the timer has timed using Discrete for 3 seconds.
Page 219: Using Counters
5–35 Standard RLL Instructions Timer, Counter, and Shift Register Instructions Using Counters Counters are used to count events . The counters available are up counters, PLUS up/down counters, and stage counters (used with RLL programming). The up counter has two inputs, a count input and a reset input. The maximum count value is 9999.
Page 220: Counter (Cnt)
NOTE: Counter preset constants (K) may be changed by using a programming device, even when the CPU is in Run Mode. Therefore, a V-memory preset is required only if the ladder program must change the preset. Operand Data Type DL05 Range Counters 0–177 ––...
Page 221: Counter Example Using Discrete Status Bits
5–37 Standard RLL Instructions Timer, Counter, and Shift Register Instructions Counter Example In the following example, when X1 makes an off to on transition, counter CT2 will Using Discrete increment by one. When the current value reaches the preset value of 3, the counter Status Bits status bit CT2 will turn on and energize Y7.
Page 222: Stage Counter (Sgcnt)
CT memory location. It will be on if the value is equal to or greater than the preset value. For example the discrete status bit for counter 2 would be CT2. Operand Data Type DL05 Range Counters 0–177 –– V memory 1200–7377...
Page 223: Stage Counter Example Using Discrete Status Bits
5–39 Standard RLL Instructions Timer, Counter, and Shift Register Instructions Stage Counter In the following example, when X1 makes an off to on transition, stage counter CT7 Example Using will increment by one. When the current value reaches 3, the counter status bit CT7 Discrete Status will turn on and energize Y7.
Page 224: Up Down Counter (Udc)
Operating as a “counter done bit” it will be on if the value is equal to or greater than the preset value. For example the discrete status bit for counter 2 would be CT2. Operand Data Type DL05 Range Counters 0–176 –– V memory 1200–7377...
Page 225: Up / Down Counter Example Using Discrete Status Bits
5–41 Standard RLL Instructions Timer, Counter, and Shift Register Instructions Up / Down Counter In the following example if X2 and X3 are off ,when X1 toggles from off to on the Example Using counter will increment by one. If X1 and X3 are off the counter will decrement by one Discrete Status when X2 toggles from off to on.
Page 226: Shift Register (Sr)
The maximum size of the shift register block depends on the number of available control relays. The minimum block size is 8 control relays. Operand Data Type DL05 Range Control Relay 0–777 0–777...
Page 227: Accumulator / Stack Load And Output Data Instructions
Accumulator / Stack Load and Output Data Instructions Using the The accumulator in the DL05 internal CPUs is a 32 bit register which is used as a Accumulator temporary storage location for data that is being copied or manipulated in some manor.
Page 228: Changing The Accumulator Data
5–44 Standard RLL Instructions Accumulator / Stack Load and Output Data Instructions Changing the Instructions that manipulate data also use the accumulator. The result of the Accumulator Data manipulated data resides in the accumulator. The data that was being manipulated is cleared from the accumulator.
Page 229: Using The Accumulator Stack
5–45 Standard RLL Instructions Accumulator / Stack Load and Output Data Instructions Using the The accumulator stack is used for instructions that require more than one parameter Accumulator Stack to execute a function or for user defined functionality. The accumulator stack is used when more than one Load instruction is executed without the use of an Out instruction.
Page 230: Using Pointers
Level 8 V2002 Using Pointers Many of the DL05 series instructions will allow V-memory pointers as a operand (commonly known as indirect addressing). Pointers allow instructions to obtain data from V-memory locations referenced by the pointer value. NOTE: DL05 V-memory addressing is in octal. However, the pointers reference a V-memory location with values viewed as HEX.
Page 231 5–47 Standard RLL Instructions Accumulator / Stack Load and Output Data Instructions V2076 V2077 P2000 V2100 V1400 (P1400) contains the value 440 V2101 HEX. 440 HEX. = 2100 Octal which contains the value 2635. V2102 V2000 V2103 Accumulator V2104 V2105 V2200 Copy the data from the lower 16 bits of V2200...
Page 232: Load (Ld)
16 bits of the accumulator. A aaa The upper 16 bits of the accumulator are set to 0. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All V mem. (See page 4–28) Constant 0–FFFF...
Page 233: Load Double (Ldd )
(Aaaa), which is either two consecutive V memory locations or an 8 digit constant value, into A aaa the accumulator. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All V mem. (See page 4–28) Constant 0–FFFFFFFF...
Page 234: Load Formatted (Ldf)
A aaa The instruction requires a starting location (Aaaa) and the number of bits (Kbbb) to be loaded. Unused accumulator bit locations are set to zero. Operand Data Type DL05 Range Inputs 0–377 –– Outputs 0–377 ––...
Page 235: Load Address (Lda)
HEX value into the accumulator. O aaa This instruction is useful when an address parameter is required since all addresses for the DL05 system are in octal. Operand Data Type DL05 Range Octal Address All V mem. (See page 4–28)
Page 236: Out (Out)
16 bits of the accumulator to a specified V memory A aaa location (Aaaa). Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All V mem. (See page 4–28) Discrete Bit Flags...
Page 237: Out Formatted (Outf)
(OUTF) specified discrete memory locations. The OUTF A aaa instruction requires a starting location (Aaaa) for the destination and the number of bits (Kbbb) to be output. Operand Data Type DL05 Range Inputs 0–377 –– Outputs 0–377 –– Control Relays 0–777...
Page 238: Pop Instruction Continued
5–54 Standard RLL Instructions Accumulator / Stack Load and Output Data Instructions Pop Instruction In the example below, when C0 is on, the value 4545 that was on top of the stack is Continued moved into the accumulator using the Pop instruction The value is output to V2000 using the Out instruction.
Page 239: Logical Instructions (Accumulator)
V memory location (Aaaa). The A aaa result resides in the accumulator. The discrete status flag indicates if the result of the And is zero. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Discrete Bit Flags...
Page 240: And Double (Andd)
Discrete status flags indicate if the result of the And Double is zero or a negative number (the most significant bit is on). Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Constant 0–FFFFFFFF...
Page 241: Or (Or)
(Aaaa). The result A aaa resides in the accumulator. The discrete status flag indicates if the result of the Or is zero. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Discrete Bit Flags...
Page 242: Or Double (Ord)
Discrete status flags indicate if the result of the Or Double is zero or a negative number (the most significant bit is on). Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Constant 0–FFFFFFFF...
Page 243: Exclusive Or (Xor)
(Aaaa). The result resides in the in the accumulator. The discrete status flag indicates if the result of the XOR is zero. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Discrete Bit Flags...
Page 244: Exclusive Or Double (Xord)
Discrete status flags indicate if the result of the Exclusive Or Double is zero or a negative number (the most significant bit is on). Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Constant 0–FFFFFFFF...
Page 245: Compare (Cmp)
V memory location A aaa (Aaaa). The corresponding status flag will be turned on indicating the result of the comparison. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Discrete Bit Flags...
Page 246: Compare Double (Cmpd)
A aaa memory locations or an 8–digit (max.) constant. The corresponding status flag will be turned on indicating the result of the comparison. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Constant 0–FFFFFFFF...
Page 247: Math Instructions
BCD value in the accumulator with a (ADD) BCD value in a V memory location (Aaaa). The result resides in the A aaa accumulator. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Discrete Bit Flags Description...
Page 248: Add Double (Addd)
BCD value (Aaaa), which is either ADDD two consecutive V memory locations or A aaa an 8–digit (max.) BCD constant. The result resides in the accumulator. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Constant 0–99999999...
Page 249: Subtract (Sub)
BCD value in the lower 16 bits of the accumulator. The A aaa result resides in the accumulator. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Discrete Bit Flags...
Page 250: Subtract Double (Subd)
SUBD locations or an 8-digit (max.) constant, A aaa from the BCD value in the accumulator. The result resides in the accumulator. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Constant 0–99999999...
Page 251: Multiply (Mul)
(max.) constant, by the BCD value in the A aaa lower 16 bits of the accumulator The result can be up to 8 digits and resides in the accumulator. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Constant 0–9999...
Page 252: Multiply Double (Muld)
The lower 8 A aaa digits of the results reside in the accumulator. Upper digits of the result reside in the accumulator stack. Operand Data Type DL05 Range Vmemory All (See p. 4–28) Pointer All (See page 4–28) Discrete Bit Flags...
Page 253: Divide (Div)
A aaa constant. The first part of the quotient resides in the accumulator and the remainder resides in the first stack location. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Constant 1–9999...
Page 254: Divide Double (Divd)
The first part of the quotient resides in the accumulator and the remainder resides in the first stack location. Operand Data Type DL05 Range Vmemory All (See p. 4–28) Pointer All (See p. 4–28) Discrete Bit Flags...
Page 255: Increment (Inc)
The Decrement instruction decrements a (DEC) BCD value in a specified V memory location A aaa by “1” each time the instruction is executed. Operand Data Type DL05 Range Vmemory All (See p. 4–28) Pointer All (See p. 4–28) Discrete Bit Flags...
Page 256: Increment Binary (Incb)
V memory location by “1” each time the INCB instruction is executed. A aaa Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28) Discrete Bit Flags...
Page 257: Add Binary (Addb)
(Aaaa), which is either a V memory location or a 16-bit constant. The result can be up to 32 bits (unsigned 2’s complement) resides accumulator. Operand Data Type DL05 Range Vmemory All (See p. 4–28) Pointer All V mem (See p. 4–28) Constant 0–FFFF...
Page 258: Subtract Binary (Subb)
2’s SUBB complement binary value, from the binary A aaa value in the accumulator. The result resides in the accumulator. Operand Data Type DL05 Range Vmemory All (See p. 4–28) Pointer All (See p. 4–28) Constant 0–FFFF Discrete Bit Flags...
Page 259: Multiply Binary (Mulb)
16-bit unsigned 2’s complement binary constant, by the16-bit binary value in the accumulator The result can be up to 32 bits and resides in the accumulator. Operand Data Type DL05 Range Vmemory All (See p. 4–28) Pointer All (See p. 4–28) Constant 1–FFFF...
Page 260: Divide Binary (Divb)
A aaa complement binary constant. The first part of the quotient resides in the accumulator and the remainder resides in the first stack location. Operand Data Type DL05 Range Vmemory All (See p. 4–28) Pointer All (See p. 4–28) Constant 0–FFFF...
Page 261: Bit Operation Instructions
5–77 Standard RLL Instructions Bit Operation Instructions Bit Operation Instructions The Sum instruction counts number of bits (SUM) that are set to “1” in the accumulator. The HEX result resides in the accumulator. In the following example, when X1 is on, the value formed by discrete locations X10–X17 is loaded into the accumulator using the Load Formatted instruction.
Page 262 5–78 Standard RLL Instructions Bit Operation Instructions Operand Data Type DL05 Range V memory All (See page 4–28) Constant 1–32 Discrete Bit Flags Description SP63 On when the result of the instruction causes the value in the accumulator to be zero.
Page 263: Shift Right (Shfr)
(Aaaa) of places to the right. The SHFR vacant positions are filled with zeros and A aaa the bits shifted out of the accumulator are lost. Operand Data Type DL05 Range V memory All (See page 4–28) Constant 1–32 Discrete Bit Flags Description SP63 On when the result of the instruction causes the value in the accumulator to be zero.
Page 264: Encode (Enco)
5–80 Standard RLL Instructions Bit Operation Instructions Encode The Encode instruction encodes the bit (ENCO) position in the accumulator having a value of 1, and returns the appropriate binary ENCO representation. If the most significant bit is set to 1 (Bit 31), the Encode instruction would place the value HEX 1F (decimal 31) in the accumulator.
Page 265: Decode (Deco)
5–81 Standard RLL Instructions Bit Operation Instructions Decode The Decode instruction decodes a 5 bit (DECO) binary value of 0–31 (0–1F HEX) in the accumulator by setting the appropriate bit DECO position to a 1. If the accumulator contains the value F (HEX), bit 15 will be set in the accumulator.
Page 266: Number Conversion Instructions (Accumulator)
5–82 Standard RLL Instructions Number Conversion Instructions Number Conversion Instructions (Accumulator) Binary The Binary instruction converts a BCD (BIN) value in the accumulator to the equivalent binary value. The result resides in the accumulator. In the following example, when X1 is on, the value in V2000 and V2001 is loaded into the accumulator using the Load Double instruction.
Page 267: Binary Coded Decimal (Bcd)
5–83 Standard RLL Instructions Number Conversion Instructions Binary Coded The Binary Coded Decimal instruction Decimal converts a binary value in the accumulator (BCD) to the equivalent BCD value. The result resides in the accumulator. In the following example, when X1 is on, the binary (HEX) value in V2000 and V2001 is loaded into the accumulator using the Load Double instruction.
Page 268: Invert (Inv)
5–84 Standard RLL Instructions Number Conversion Instructions Invert The Invert instruction inverts or takes the (INV) one’s complement of the 32 bit value in the accumulator. The result resides in the accumulator. In the following example, when X1 is on, the value in V2000 and V2001 will be loaded into the accumulator using the Load Double instruction.
Page 269: Ascii To Hex (Ath)
Helpful Hint: — For parameters that require HEX values when referencing memory locations, the LDA instruction can be used to convert an octal address to the HEX equivalent and load the value into the accumulator. Operand Data Type DL05 Range Vmemory All (See p. 4–28) Discrete Bit Flags...
Page 270: Hex To Ascii (Hta)
5–86 Standard RLL Instructions Number Conversion Instructions DirectSOFT Display Hexadecimal Equivalents ASCII TABLE Load the constant value into the lower 16 bits of the accumulator. This value defines the number of V memory location in the ASCII table 33 34 V1400 Convert octal 1400 to HEX 1234...
Page 271 5–87 Standard RLL Instructions Number Conversion Instructions Operand Data Type DL05 Range Vmemory All (See p. 4–28) Discrete Bit Flags Description SP53 On when the value of the operand is larger than the accumulator can work with. In the following example, when X1 is ON the constant (K2) is loaded into the accumulator using the Load instruction.
Page 272: Gray Code (Gray)
5–88 Standard RLL Instructions Number Conversion Instructions Gray Code The Gray code instruction converts a 16 bit (GRAY) gray code value to a BCD value. The BCD conversion requires 10 bits of the accumulator. The upper 22 bits are set to GRAY “0”.
Page 273: Shuffle Digits (Sfldgt)
5–89 Standard RLL Instructions Number Conversion Instructions Shuffle Digits The Shuffle Digits instruction shuffles a (SFLDGT) maximum of 8 digits rearranging them in a specified order. This function requires parameters to be loaded into the first level SFLDGT of the accumulator stack and the accumulator with additional...
Page 274 5–90 Standard RLL Instructions Number Conversion Instructions In the following example when X1 is on, The value in the first level of the accumulator stack will be reorganized in the order specified by the value in the accumulator. Example A shows how the shuffle digits works when 0 or 9 –F is not used when specifying the order the digits are to be shuffled.
Page 275: Move (Mov)
Helpful Hint: — For parameters that require HEX values when referencing memory locations, the LDA instruction can be used to convert an octal address to the HEX equivalent and load the value into the accumulator. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All (See page 4–28)
Page 276: Move Memory Cartridge / Load Label (Movmc), (Ldlbl)
V memory. This is the source location of the value. Step 4:— Insert the MOVMC instruction which specifies destination in V-memory (Vaaa). This is the copy destination. Operand Data Type DL05 Range V memory All (See page 4–28)
Page 277 5–93 Standard RLL Instructions Table Instructions Copy Data From a In the example to the right, data is copied from a Data Label Area to V memory. Data Label Area to When X1 is on, the constant value (K4) is loaded into the accumulator using the V Memory Load instruction.
Page 278: Cpu Control Instructions
In the following example, when C0 turns on, the CPU will stop operation and switch to the program mode. DirectSOFT Handheld Programmer Keystrokes SHFT STOP SHFT SHFT INST# Discrete Bit Flags Description SP16 On when the DL05 goes into the TERM_PRG mode. SP53 On when the DL05 goes into the PRG mode.
Page 279: Reset Watch Dog Timer (Rstwt)
5–95 Standard RLL Instructions CPU Control Instructions Reset Watch Dog The Reset Watch Dog Timer instruction Timer resets the CPU scan timer. The default (RSTWT) setting for the watch dog timer is 200ms. Scan times very seldom exceed 200ms, RSTWT possible.
Page 280: Program Control Instructions
Depending on the length of time required complete program execution, it may be necessary to reset the watch dog timer inside of the For / Next loop using the RSTWT instruction. Operand Data Type DL05 Range V memory All (See page 4–28) Constant 1–9999...
Page 281 5–97 Standard RLL Instructions Program Control Instructions In the following example, when X1 is on, the application program inside the For / Next loop will be executed three times. If X1 is off the program inside the loop will not be executed.
Page 282: Goto Subroutine (Gts) (Sbr)
End instruction. Code which is not scanned does not impact the overall scan time of the program. Operand Data Type DL05 Range Constant 1–FFFF Subroutine Return When a Subroutine Return is executed in the subroutine the CPU will return to the...
Page 283 5–99 Standard RLL Instructions Program Control Instructions In the following example, when X1 is on, Subroutine K3 will be called. The CPU will jump to the Subroutine Label K3 and the ladder logic in the subroutine will be executed. If X35 is on the CPU will return to the main program at the RTC instruction. If X35 is not on Y0–Y17 will be reset to off and then the CPU will return to the main body of the program.
Page 284 5–100 Standard RLL Instructions Program Control Instructions In the following example, when X1 is on, Subroutine K3 will be called. The CPU will jump to the Subroutine Label K3 and the ladder logic in the subroutine will be executed. The CPU will return to the main body of the program after the RT instruction is executed.
Page 285: Master Line Set (Mls)
1. Master Line Sets and Master Line Resets can be used to nest power rails up to seven levels deep. Operand Data Type DL05 Range Constant 1–7 Master Line Reset The Master Line Reset instruction marks...
Page 286: Mls/Mlr Example
5–102 Standard RLL Instructions Program Control Instructions MLS/MLR Example In the following MLS/MLR example logic between the first MLS K1 (A) and MLR K0 (B) will function only if input X0 is on. The logic between the MLS K2 (C) and MLR K1 (D) will function only if input X10 and X0 is on.
Page 287: Interrupt Instructions
See Chapter 3, the section on Mode 40 (Interrupt) Operation for more details on interrupt configuration. In the DL05, only one hardware interrupt is available. Operand Data Type DL05 Range...
Page 288: Disable Interrupts (Disi)
5–104 Standard RLL Instructions Interrupt Instructions Disable Interrupts A Disable Interrupt instruction in the main (DISI) body of the application program (before the End instruction) will disable the DISI interupt (either extenal or timed). The interrupt remains disabled until the program executes an Enable Interrupt instruction.
Page 289: Timed Interrupt Program Example
5–105 Standard RLL Instructions Interrupt Instructions Timed Interrupt In the following example, we do some initialization on the first scan, using the Program Example first-scan contact SP0. The interrupt feature is the HSIO Mode 40. Then we configure the HSIO timer as a 10 mS interrupt by writing K104 to the configuration register for X0 (V7634).
Page 290: Message Instructions
To display the value in a V memory location, specify the V memory location in the instruction. To display the data in ACON (ASCII constant) or NCON (Numerical constant) instructions, specify the constant (K) value for the corresponding data label area. Operand Data Type DL05 Range V memory All (See page 4–28) Constant 1–FFFF...
Page 291: Data Label (Dlbl)
A maximum of 64 DLBL instructions can be used in a program. Multiple NCONs and ACONs can be used in a DLBL area. Operand Data Type DL05 Range Constant 1–FFFF ASCII Constant The ASCII Constant instruction is used (ACON) with the DLBL instruction to store ASCII text for use with other instructions.
Page 292: Data Label Example
5–108 Standard RLL Instructions Message Instructions In the following example, an ACON and two NCON instructions are used within a Data Label DLBL instruction to build a text message. See the FAULT instruction for information Example on displaying messages. The DV-1000 Manual also has information on displaying messages.
Page 293: Print Message (Print)
DL05 Range Constant You may recall from the CPU specifications in Chapter 3 that the DL05’s ports are capable of several protocols. Port 1 cannot be configured for the non-sequence portocol. To configure port 2 using the Handheld Programmer, use AUX 56 and follow the prompts, making the same choices as indicated below on this page.
Page 294 5–110 Standard RLL Instructions Message Instructions Port 2 on the DL05 has standard RS232 levels, and should work with most printer serial input connections. Text element – this is used for printing character strings. The character strings are defined as the character (more than 0) ranged by the double quotation marks. Two hex numbers preceded by the dollar sign means an 8-bit ASCII character code.
Page 295 5–111 Standard RLL Instructions Message Instructions V-memory element – this is used for printing V-memory contents in the integer format or real format. Use V-memory number or V-memory number with “:” and data type. The data types are shown in the table below. The Character code must be capital letters.
Page 296 Bit (ON/OFF format) The handheld programmer’s mnemonic is “PRINT”, followed by the DEF field. Special relay flags SP116 and SP117 indicate the status of the DL05 CPU ports (busy, or communications error). See the appendix on special relays for a description.
Page 297: Network Instructions
Helpful Hint: — For parameters that require HEX values, the LDA instruction can be used to convert an octal address to the HEX equivalent and load the value into the accumulator. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All V mem.
Page 298 5–114 Standard RLL Instructions Network Instructions In the following example, when X1 is on and the port busy relay SP116 (see special relays) is not on, the RX instruction will access port 2 operating as a master. Ten consecutive bytes of data (V2000 – V2004) will be read from a CPU at station address 5 and copied into V memory locations V2300–V2304 in the CPU with the master port.
Page 299: Write To Network (Wx)
Helpful Hint: — For parameters that require HEX values, the LDA instruction can be used to convert an octal address to the HEX equivalent and load the value into the accumulator. Operand Data Type DL05 Range V memory All (See page 4–28) Pointer All V mem.
Page 300 5–116 Standard RLL Instructions Network Instructions In the following example when X1 is on and the module busy relay SP116 (see special relays) is not on, the WX instruction will access port 2 operating as a master. Ten consecutive bytes of data is read from the Master CPU and copied to V memory locations V2000–V2004 in the slave CPU at station address 5.
Page 301: Chapter 6: Drum Instruction Programming
Drum Instruction Programming In This Chapter..Introduction Step Transitions Overview of Drum Operation Drum Control Techniques Drum Instruction EDrum Instruction...
Page 302: Introduction
6–2 Drum Instruction Programming Introduction Purpose The Event Drum (EDRUM) instruction in the DL05 CPU electronically simulates an electro-mechanical drum sequencer. The instruction offers enhancements to the basic principle, which we describe first. Drum Terminology Drum instructions are best suited for repetitive processes that consist of a finite number of steps.
Page 303: Drum Chart Representation
6–3 Drum Instruction Programming Drum Chart For editing purposes, the electronic drum is presented in chart form in DirectSOFT Representation and in this manual. Imagine slicing the surface of a hollow drum cylinder between two rows of pegs, then pressing it flat. Now you can view the drum as a chart as shown below.
Page 304: Step Transitions
6–4 Drum Instruction Programming Step Transitions Drum Instruction There are two types of Drum instructions in the DL05 CPU: Types Timed Drum with Discrete Outputs (DRUM) Time and Event Drum with Discrete Outputs (EDRUM) The two drum instructions include time-based step transitions, and the EDRUM includes event-based transitions as well.
Page 305: Timer And Event Transitions
6–5 Drum Instruction Programming For example, if you program a 5 second time base and 12 counts for Step 1, then the drum will spend 60 seconds in Step 1. The maximum time for any step is given by the formula: Max Time per step = 0.01 seconds X 9999 X 9999 = 999,800 seconds = 277.7 hours = 11.6 days...
Page 306: Event-Only Transitions
6–6 Drum Instruction Programming Event-Only Step transitions do not require both the event and the timer criteria programmed for Transitions each step. You have the option of programming just one of the two, and even mixing transition types among all the steps of the drum. For example, you might want Step 1 to transition on an event, Step 2 to transition on time only, and Step 3 to transition on both time and an event.
Page 307: Last Step Completion
6–7 Drum Instruction Programming Last Step The last step in a drum sequence may be any step number, since partial drums are Completion valid. Refer to the following figure. When the transition conditions of the last step are met, the drum sets the counter bit corresponding to the counter named in the drum instruction box (such as CT0).
Page 308: Overview Of Drum Operation
6–8 Drum Instruction Programming Overview of Drum Operation Drum Instruction The drum instruction utilizes various inputs and outputs in addition to the drum Block Diagram pattern itself. Refer to the figure below. Inputs DRUM INSTRUCTION Outputs Block Diagram Start Realtime Inputs Reset (from ladder)
Page 309: Powerup State Of Drum Registers
Counter # – The counter number specifies the first of four consecutive counters which the drum uses for step control. You can monitor these to determine the drum’s progress through its control cycle. The DL05 has 128 counters (CT0 – CT177 in octal).
Page 310: Drum Control Techniques
6–10 Drum Instruction Programming Drum Control Techniques Drum Now we are ready to put together the Start Control Inputs concepts on the previous pages and Setup demonstrate general control of the drum Outputs Info. instruction box. The drawing to the right Reset shows simplified...
Page 311: Self-Resetting Drum
6–11 Drum Instruction Programming In the figure below, we focus on how the Jog input works on event drums. To the left of the diagram, note that the off-to-on transitions of the Jog input increments the step. Start may be either on or off (however, Reset must be off). Two jogs takes the drum to step three.
Page 312: Drum Instruction
This section covers entry using DirectSOFT for all instructions plus the handheld mnemonics for the EDRUM instruction. Timed Drum with The Timed Drum with Discrete Outputs is the most basic of the DL05’s drum Discrete Outputs instructions. It operates according to the principles covered on the previous pages.
Page 313 6–13 Drum Instruction Programming Drum instructions use four counters in the CPU. The ladder program can read the counter values for the drum’s status. The ladder program may write a new preset step number to CT(n+2) at any time. However, the other counters are for monitoring purposes only.
Page 314: Event Drum (Edrum)
6–14 Drum Instruction Programming Event Drum The Event Drum (EDRUM) features time-based and event-based step transitions. It (EDRUM) operates according to the general principles of drum operation covered in the beginning of this chapter. Below is the instruction as displayed by DirectSOFT. Counter Number Step Preset Timebase...
Page 315 6–15 Drum Instruction Programming Drum instructions use four counters in the CPU. The ladder program can read the counter values for the drum’s status. The ladder program may write a new preset step number to CT(n+2) at any time. However, the other counters are for monitoring purposes only.
Page 316: Handheld Programmer Drum Mnemonics
6–16 Drum Instruction Programming Handheld The EDRUM instruction may be programmed using either DirectSOFT or a Programmer handheld programmer. This section covers entry via the handheld programmer Drum Mnemonics (Refer to the DirectSOFT manual for drum instruction entry using that tool). First, enter Store instructions for the Start Outputs...
Page 317 6–17 Drum Instruction Programming Using the DRUM entry chart (two pages before), we show the method of entry for the basic time/event drum instruction. First, we convert the output pattern for each step to the equivalent hex number, as shown in the following example. f f f f f f f Step 1...
Page 318 6–18 Drum Instruction Programming Handheld Programmer Keystrokes cont’d Handheld Programmer Keystrokes cont’d skip over unused event ( DEF 0000 ) NEXT step 1 pattern = 0000 NEXT ( DEF K0000 ) ( DEF 0000 ) SHFT NEXT NEXT ( DEF K0000 ) SHFT NEXT ( DEF 0000 )
Page 319 PLUS Stage Programming In This Chapter..Introduction to Stage Programming Learning to Draw State Transition Diagrams Using the Stage Jump Instruction for State Transitions Stage Program Example: Toggle On/Off Lamp Controller Four Steps to Writing a Stage Program Stage Program Example: A Garage Door Opener Stage Program Design Considerations PLUS...
Page 320: Introduction To Stage Programming
7–2 PLUS Stage Programming Introduction to Stage Programming Stage Programming provides a way to organize and program complex applications with relative ease, when compared to purely relay ladder logic (RLL) solutions. Stage programming does not replace or negate the use of traditional boolean ladder PLUS programming.
Page 321: Learning To Draw State Transition Diagrams
7–3 PLUS Stage Programming Learning to Draw State Transition Diagrams Introduction to Those familiar with ladder program Process States execution know that the CPU must scan Ladder Inputs Outputs the ladder program repeatedly, over and Program over. Its three basic steps are: 1.
Page 322: Rll Equivalent
7–4 PLUS Stage Programming The state transition diagram to the right is a picture of the solution we need to create. The beauty of it is this: it expresses the problem independently programming language we may use to realize it. In other words, by drawing the diagram we have already solved the Output equation: Y0 = ON control problem!
Page 323: Let's Compare
7–5 PLUS Stage Programming Let’s Compare Right now, you may be thinking “I don’t see the big advantage to Stage Programming... in fact, the stage program is longer than the plain RLL program”. Well, now is the time to exercise a bit of faith. As control problems grow in complexity, stage programming quickly out-performs RLL in simplicity, program size, etc.
Page 324: What Stage Bits Do
Octal numbering – Stages are numbered in octal, like I/O points, etc. So “S8” is not valid. Total Stages – The DL05 offers up to 256 stages (S0 to S377 in octal). No duplicates – Each stage number is unique and can be used just once.
Page 325: Using The Stage Jump Instruction For State Transitions
7–7 PLUS Stage Programming Using the Stage Jump Instruction for State Transitions Stage Jump, Set, The Stage JMP instruction we have used deactivates the stage in which the and Reset instruction occurs, while activating the stage in the JMP instruction. Refer to the Instructions state transition shown below.
Page 326: Stage Program Example: Toggle On/Off Lamp Controller
7–8 PLUS Stage Programming Stage Program Example: Toggle On/Off Lamp Controller Inputs Outputs A 4–State Process In the process shown to the right, we use an ordinary momentary pushbutton to control a light bulb. The ladder program Toggle will latch the switch input, so that we will Ladder push and release to turn on the light, push Program...
Page 327: Four Steps To Writing A Stage Program
Translate the state transition diagram into a stage program. Make each state a stage. Remember to number stages in octal. Up to 256 total stages are available in the DL05, numbered 0 to 377 in octal. Put transition logic inside the stage which originates each transition (the stage each arrow points away from).
Page 328: Stage Program Example: A Garage Door Opener
7–10 PLUS Stage Programming Stage Program Example: A Garage Door Opener Garage Door In this next stage programming example Opener Example we’ll create a garage door opener controller. Hopefully most readers are familiar with this application, and we can have fun besides! The first step we must take is to describe how the door opener works.
Page 329: Draw The State Diagram
7–11 PLUS Stage Programming Draw the State Now we are ready to draw the state transition diagram. Like the previous light bulb Diagram controller example, this application also has just one switch for the command input. Refer to the figure below. When the door is down (DOWN state), nothing happens until X0 energizes.
Page 330: Add Safety Light Feature
7–12 PLUS Stage Programming Add Safety Next we will add a safety light feature to Light Feature the door opener system. It’s best to get the main function working first as we have done, then adding the secondary features. The safety light is standard on many Safety light commercially-available garage...
Page 331: Using A Timer Inside A Stage
7–13 PLUS Stage Programming Using a Timer The finished modified program is shown to Inside a Stage the right. The shaded areas indicate the DOWN State program additions. In the Push-UP stage S1, we add the Set Stage Bit S6 instruction. When contact X0 opens, we transition from S1 and go to two new active states: S2 and S6.
Page 332: Add Emergency Stop Feature
7–14 PLUS Stage Programming Add Emergency Some garage door openers today will Stop Feature detect an object under the door. This halts further lowering of the door. Usually implemented with photocell (“electric-eye”), a door in the process of being lowered will halt and begin raising. We will define our safety feature to work in this way, adding the input from the photocell to the block diagram as shown to...
Page 333: Stage Program Design Considerations
7–15 PLUS Stage Programming Stage Program Design Considerations Stage Program The examples so far in this chapter used one self-contained state diagram to Organization represent the main process. However, we can have multiple processes implemented in stages, all in the same ladder program. New stage programmers sometimes try to turn a stage on and off each scan, based on the false assumption that only one stage can be on at a time.
Page 334: How Instructions Work Inside Stages
7–16 PLUS Stage Programming How Instructions We can think of states or stages as simply dividing up our ladder program as Work Inside Stages depicted in the figure below. Each stage contains only the ladder rungs which are needed for the corresponding state of the process. The logic for transitioning out of a stage is contained within that stage.
Page 335: Using A Stage As A Supervisory Process
7–17 PLUS Stage Programming Using a Stage as a You may recall the light bulb on-off Supervisory controller example from earlier in this Toggle Process chapter. For the purpose of illustration, Ladder suppose want monitor Program “productivity” of the lamp process, by counting the number of on-off cycles which occurs.
Page 336: Power Flow Transition Technique
7–18 PLUS Stage Programming Power Flow Our discussion of state transitions has shown how the Stage JMP instruction makes Transition the current stage inactive and the next stage (named in the JMP) active. As an Technique alternative way to enter this in DirectSOFT, you may use the power flow method for stage transitions.
Page 337: Convergence Stages (Cv)
7–19 PLUS Stage Programming Parallel Processing Concepts Parallel Processes Previously in this chapter we discussed how a state may transition to either one state or another, called an exclusive transition. In other cases, we may need to branch simultaneously to two or more parallel processes, as shown below. It is acceptable to use all JMP instructions as shown, or we could use one JMP and a Set Stage bit instruction(s) (at least one must be a JMP, in order to leave S1).
Page 338: Convergence Jump (Cvjmp)
7–20 PLUS Stage Programming Convergence Jump Recall the last convergence stage only (CVJMP) has power flow when all CV stages in the Convergence group are active. To complement the Jump convergence stage, we need a new jump instruction. Convergence Jump (CVJMP) shown to the right will transition to Stage S5 when X3 is active (as one might expect), but it also automatically...
Page 339: Rllplus (Stage) Instructions
Stages are deactivated one scan after transitional logic, a jump, or a reset stage instruction is executed. Operand Data Type DL05 Range Stage 0–377 PLUS The following example is a simple RLL program.
Page 340: Initial Staget (Isg)
They will be active when the CPU enters the Run mode allowing for a starting point in the program. Operand Data Type DL05 Range Stage 0–377 Initial Stages are also activated by transitional logic, a jump or a set stage executed from an active stage.
Page 341: Converge Stage (Cv) And Converge Jump (Cvjmp)
CVJMP instruction. Multiple CVJUMP instructions are allowed. Converge Stages must be programmed in the main body of the application program. This means they cannot be programmed in Subroutines or Interrupt Routines. Operand Data Type DL05 Range Stage 0–377...
Page 342 7–24 PLUS Stage Programming In the following example, when Converge Stages S10 and S11 are both active the CVJMP instruction will be executed when X4 is on. The CVJMP will deactivate S10 and S11, and activate S20. Then, if X5 is on, the program execution will jump back to the initial stage, S0.
Page 343: Questions And Answers About Stage Programming
7–25 PLUS Stage Programming Questions and Answers about Stage Programming We include the following commonly-asked questions about Stage Programming as an aid to new students. All question topics are covered in more detail in this chapter. Q. What does stage programming do that I can’t do with regular RLL programs? A.
Page 344 7–26 PLUS Stage Programming Q. Isn’t a Stage JMP just like a regular GOTO instruction used in software? A. No, it is very different. A GOTO instruction sends the program execution immediately to the code location named by the GOTO. A Stage JMP simply resets the Stage Bit of the current stage, while setting the Stage Bit of the stage named in the JMP instruction.
Page 345: Chapter 8: Pid Loop Operation
PID Loop Operation In This Chapter..— DL05 PID Loop Features — Loop Setup Parameters — Loop Sample Rate and Scheduling — Ten Steps to Successful Process Control — Basic Loop Operation — PID Loop Data Configuration —...
Page 346: Dl05 Pid Loop Features
Loop Variable Table in the CPU. The DL05 CPU reads process variable (PV) inputs during each scan. Then it makes PID loop calculations during a dedicated time slice on each PLC scan,...
Page 347 8–3 PID Loop Operation PID Loop Feature Specifications Number of loops Selectable, 4 maximum CPU V-memory needed 32 words (V locations) per loop selected, 64 words if using ramp/soak PID algorithm Position or Velocity form of the PID equation Control Output polarity Selectable direct-acting or reverse-acting Error term curves Selectable as linear, square root of error, and error squared...
Page 348: The Basics Of Pid Loops
Loop Calculation – the real-time application of a mathematical algorithm to the error term, generating a control output command appropriate for minimizing the error magnitude. Various control algorithms are available, and the DL05 uses the Proportional-Integral-Derivative (PID) algorithm (more on this later).
Page 349 The personal computer shown is used to run DirectSOFT32, the PLC programming software for DirectLOGIC programmable controllers. DirectSOFT32, release 3.0c or later, can program the DL05 PLC (including the PID feature). The software features a forms-based editor to configure loop parameters. It also features a PID loop trending screen which will be helpful during the loop tuning process.
Page 350: Loop Setup Parameters
PID Loop Operation Loop Setup Parameters Loop Table and The DL05 PLC gets its PID loop processing instructions only from tables in Number of Loops V-memory. A “PID instruction” type in RLL does not exist for the DirectLogic PLCs. Instead, the CPU reads setup parameters from reserved V-memory locations.
Page 351: Establishing The Loop Table Size And Location
1, V2040 – V2077 for loop 2 and so 32 words on. Loop 4 occupies V2140 – V2177. LOOP #4 32 words NOTE: The DL05 CPU’s PID algorithm requires DirectSOFT32 Version 3.0c (or later) and firmware version 2.1 (or later). See our website for more information: www.automationdirect.com.
Page 352: Loop Table Word Definitions
8–8 PID Loop Operation Loop Table The parameters associated with each loop are listed in the following table. The Word Definitions address offset is in octal, to help you locate specific parameters in a loop table. For example, if a table begins at V2000, then the location of the reset (integral) term is Addr+11, or V2011.
Page 353 8–9 PID Loop Operation PID Mode Setting 1 The individual bit definitions of the PID Mode Setting 1 word (Addr+00) are listed in Bit Descriptions the following table. Additional information about the use of this word is available later (Addr + 00) in this chapter.
Page 354: Pid Mode Setting 2 Bit Descriptions (Addr + 01)
8–10 PID Loop Operation PID Mode Setting 2 The individual bit definitions of the PID Mode Setting 2 word (Addr+01) are listed in Bit Descriptions the following table. Additional information about the use of this word is available later (Addr + 01) in this chapter.
Page 355: Mode / Alarm Monitoring Word (Addr + 06)
8–11 PID Loop Operation Mode / Alarm The individual bit definitions of the Mode / Alarm monitoring (Addr+06) word is listed Monitoring Word in the following table. More details are in the PID Mode section and Alarms section. (Addr + 06) Mode / Alarm Bit Description Read/Write Bit=0...
Page 356: Ramp/Soak Table Location (Addr + 34)
8–12 PID Loop Operation Ramp/Soak Each loop that you configure has the option of using a built-in Ramp/Soak generator Table Location dedicated to that loop. This feature generates SP values that follow a profile. To use (Addr + 34) the Ramp Soak feature, you must program a separate table of 32 words with appropriate values.
Page 357: Loop Sample Rate And Scheduling
Program frequency of the PID calculation. Each Scan calculation generates a new control output value. With the DL05 CPU, you can set the Calculate PID Loops sample rate of a loop from 50 mS to 99.99 seconds. Most loops do not require a fresh PID calculation on every PLC scan.
Page 358: Programming The Sample Rate
8–14 PID Loop Operation Determining a suitable sample rate (Addr+07): 1. Operate the process open-loop (the loop does not even need to be configured yet). Place the CPU in run mode (and the loop in Manual mode, if you have already configured it). Manually set the control output value so the PV is stable and in the middle of a safe range.
Page 359: Pid Loop Effect On Cpu Scan Time
1 to L (last loop), and add the right-most term “scan time without loops” only once at the end. Suppose you have a DL05 PLC controlling four loops. The table below shows the data and summation term values for each loop.
Page 360 8–16 PID Loop Operation The DL05 CPU only does PID calculation on a particular scan for the loop(s) which have sample time periods that are due for an update (calculation). The built-in loop scheduler applies the following rules: Loops with sample rates 2 seconds are processed at the rate of as many loops per scan as is required to maintain each loop’s sample rate.
Page 361: Ten Steps To Successful Process Control
PID Loop Operation Ten Steps to Successful Process Control Modern electronic controllers such as the DL05 CPU provide sophisticated process control features. Automated control systems can be difficult to debug, because a given symptom can have many possible causes. We recommend a careful,...
Page 362: Step 5: Wiring And Installation
8–18 PID Loop Operation DL05 CPU V-memory Input Digital Module Output Loop 1 Data Process 1 Channel 1 Channel 1 Loop 2 Data Process 2 Channel 2 Channel 2 Channel 3 Channel 4 Step 5: After selection and procurement of all loop components and I/O module(s), you can perform the wiring and installation.
Page 363: Basic Loop Operation
8–19 PID Loop Operation Basic Loop Operation Data Locations Each PID loop is dependent on the instructions and data values in its respective loop table. The following diagram shows an example of the loop table locations corresponding to the main three loop variables: SP, PV, and Control Output. The example below begins at V2000 (you can use any memory location compatible with Loop Table requirements).
Page 364: Direct Access To Analog I/O
8–20 PID Loop Operation Direct Access The loop controller in the DL05 PLC has the ability to directly access analog input to Analog I/O and output values independent of the ladder logic scan. These values represent the process variable (PV) and the control output. The Direct Access feature makes it possible for the loop controller to perform closed-loop control while the CPU is in Program Mode.
Page 365: Loop Modes
PID Loop Operation Loop Modes The DL05 gives you the three standard control modes: Manual, Automatic, and Cascade. The sources of the three basic variables SP, PV, and control output are different for each mode. An introduction to the three control modes and their signal sources follows.
Page 366: Cpu Modes And Loop Modes
8–22 PID Loop Operation CPU Modes and The DL05 PLC has the ability to run PID calculations while the CPU is in Program Loop Modes Mode. Usually, a CPU in Program Mode has halted all operations. However, a DL05 PLC in Program Mode may or may not be running PID calculations (and providing PID control output), depending on your configuration settings.
Page 367: How To Change Loop Modes
8–23 PID Loop Operation How to Change The first three bits of the PID Mode 1 word PID Mode 1 Setting V+00 Loop Modes (V+00) request the operating mode of the corresponding loop. Note: these bits are mode change requests, not commands (certain conditions prohibit...
Page 368: Operator Panel Control Of Pid Modes
8–24 PID Loop Operation Operator Panel Since the modes Manual, Auto, and Cascade are the most fundamental and Control of important PID loop controls, you may want to “hard-wire” mode control switches to PID Modes an operator’s panel. Most applications will need only Manual and Auto selections (Cascade is used in a few advanced applications).
Page 369: Bumpless Transfers
(no bump on the control output). The bumpless transfer feature of the DL05 PID Mode 1 Setting V+00 loop controller is available in two types: Bumpless I, and Bumpless II.
Page 370: Pid Loop Data Configuration
8–26 PID Loop Operation PID Loop Data Configuration Loop Parameter In choosing the Process Variable range and resolution, a related choice to make is Data Formats the data format of the three main loop variables: SP, PV, and Control Output (the Integrator sum in V+04 also uses this data format).
Page 371: Handling Data Offsets
8–27 PID Loop Operation Handling In many batch process applications, sensors or actuators interface to DL05 analog Data Offsets modules using 4–20 mA signals. This signal type has a built-in 20% offset, because the zero-point is a 4 mA instead of 0 mA. However, remember the analog modules convert the signals into data and remove the offset at the same time.
Page 372: Remote Setpoint (Sp) Location
8–28 PID Loop Operation Remote Setpoint You may recall there are generally several possible data sources for the SP value. (SP) Location The PID loop controller has the built-in ability to select between two sources according to the current loop mode. Refer to the figure below. A loop reads its setpoint from table location V+02 in Auto or Manual modes.
Page 373: Control Output Configuration
8–29 PID Loop Operation IMPORTANT: The scaling of the SP must be adjusted if you use PV square-root extract, because the loop drives the output so the square root of the PV is equal to the PV input. Divide the desired SP value by the square root of the analog span, and use the result in the V+02 location for the SP.
Page 374: Error Term Configuration
8–30 PID Loop Operation Error Term The Error term is internal to the CPUs PID loop controller, and is generated again in Configuration each PID calculation. Although its data is not directly accessible, you can easily calculate it by subtracting: Error = (SP–PV). If the PV square-root extract is enabled, then Error = (SP –...
Page 375: Pid Algorithms
PID equations digitally by solving the basic equations in software. I/O modules serve only to convert electronic signals into digital form (or vise-versa). The DL05 features two types of PID controls: “position” and “velocity”. These terms usually refer to motion control situations, but here we use them in a different sense: PID Position Algorithm –...
Page 376: Velocity Algorithm
8–32 PID Loop Operation The position algorithm variables and related variables are: = Sample rate = Proportional gain * (T ) coefficient of integral term * (T ) coefficient of derivative term = Reset time (integral time) = Rate time (derivative time) = Set Point for sampling time “...
Page 377: Direct-Acting And Reverse-Acting Loops
8–33 PID Loop Operation Direct-Acting and The gain of a process determines, in part, how it must be controlled. The process Reverse-Acting shown in the diagram below has a positive gain, which we call “direct-acting”. This Loops means that when the control output increases, the process variable also eventually increases.
Page 378: P-I-D Loop Terms
8–34 PID Loop Operation P-I-D Loop Terms You may recall the introduction of the position and velocity forms of the PID loop equations. The equations basically show the three components of the PID calculation. The following figure shows a schematic form of the PID calculation, in which the control output is the sum of the proportional, integral and derivative terms.
Page 379: Using A Subset Of Pid Control
Many applications actually work best by using a subset of PID control. The PID Control figure below shows the various combinations of PID control offered on the DL05. We do not recommend using any other combination of control, because most of them...
Page 380: Derivative Gain Limiting
8–36 PID Loop Operation Derivative Gain The derivative term is unique in that it has an optional gain-limiting feature. This is Limiting provided because the derivative term reacts badly to PV signal noise or other causes of sudden PV fluctuations. The function of the gain-limiting is shown in the diagram below.
Page 381: Bias Freeze
8–37 PID Loop Operation Bias Freeze The term “reset windup” refers to an undesirable characteristic of integrator behavior which occurs naturally under certain conditions. Refer to the figure below. Suppose the PV signal becomes disconnected, and the PV value goes to zero. While this is a serious loop fault, it is made worse by reset windup.
Page 382: Loop Tuning Procedure
Make sure you thoroughly consider the impact of any changes to minimize the risk of injury to personnel or damage to equipment. The auto tune in the DL05 is not intended to perform as a replacement for your process knowledge. Open-Loop Test Whether you use manual or auto tuning, it is very important to verify basic characteristics of a newly-installed process before attempting to tune it.
Page 383: Manual Tuning Procedure
8–39 PID Loop Operation Manual Tuning Now comes the exciting moment when we actually close the loop (go to Auto Mode) Procedure for the first time. Use the following checklist before switching to Auto mode: Monitor the loop parameters with a loop trending instrument. We recommend using the PID view feature of DirectSOFT.
Page 384: Auto Tuning Procedure
The auto tune in the DL05 is not intended to perform as a replacement for your process knowledge. The loop controller offers both closed-loop and open-loop methods. If you intend to use the auto tune feature, we recommend you use the open-loop method first.
Page 385 8–41 PID Loop Operation The controls for the auto tuning function use three bits in the PID Mode 2 word V+01, as shown below. DirectSOFT32 will manipulate these bits automatically when you use the auto tune feature within DirectSOFT. Or, you may have ladder logic access these bits directly for allowing control from another source such as a dedicated operator interface.
Page 386 8–42 PID Loop Operation The following timing diagram shows the events which occur in the open-loop auto tuning cycle. The auto tune function takes control of the control output and induces a 10%-of-span step change. If the PV change which the loop controller observes is less than 2%, then the step change on the output is increased to 20%-of-span.
Page 387 8–43 PID Loop Operation Closed-Loop Auto Tuning – During a closed-loop auto tuning cycle, the loop controller operates as shown in the diagram below. PLC System Process Variable Response Limit cycle wave Closed Loop Auto Tuning Control Setpoint Value Error Term Loop Output Manufacturing...
Page 388: Tuning Cascaded Loops
8–44 PID Loop Operation When the loop tuning observations are complete, the loop controller computes To (bump period) and Xo (amplitude of the PV). Then it uses these values to compute Kpc (sensitive limit) and Tpc (period limit). From these values, the loop controller auto tune function computes the PID gains and the sample rate according to the Ziegler-Nichols equations shown below: Kpc = 4M / (π...
Page 389: Pv Analog Filter
PV. There are two equivalent methods of filtering the PV input to make the loop more stable. The first method is accomplished using the DL05’s built-in filter. The second method achieves a similar result using ladder logic.
Page 390: Creating An Analog Filter In Ladder Logic
8–46 PID Loop Operation The algorithm which the built-in filter follows is: = k (x – y ) + y i–1 i–1 is the current output of the filter is the current input to the filter is the previous output of the filter i–1 k is the PV Analog Input Filter Factor Creating an...
Page 391: Feedforward Control
Reducing integrator gain gives us an even more stable control system. Feedforward is very easy to use in the DL05 loop controller, as shown below. The bias term has been made available to the user in a special read/write location, at PID Parameter Table location V+04.
Page 392: Feedforward Example
8–48 PID Loop Operation To change the bias (operating point), ladder logic only has to write the desired value to V+04. The PID loop calculation first reads the bias value from V+04 and modifies the value based on the current integrator calculation. Then it writes the result back to location V+04.
Page 393: Time-Proportioning Control
PID Loop Operation Time-Proportioning Control The PID loop controller in the DL05 CPU generates a smooth control output signal across a numerical range. The control output value is suitable to drive an analog output module, which connects to the process. In the process control field, this is called continuous control, because the output is on (at some level) continuously.
Page 394: On/Off Control Program Example
8–50 PID Loop Operation On/Off Control The following ladder segment provides a time proportioned on/off control output. It Program Example converts the continuous output in V2005 to on/off control using the output coil, Y0. Time V2005 Loop Process Proportioning Calculation –...
Page 395: Cascade Control
As the name implies, cascade means that one loop is connected to another loop. In addition to Manual (open loop) and Auto (closed loop) Modes, the DL05 also provides Cascaded Mode. NOTE: Cascaded loops are an advanced process control technique. Therefore we recommend their use only for experienced process control engineers.
Page 396: Cascaded Loops In The Dl05 Cpu
Remember that all minor loops will be in Cascade Mode, and only the outer-most (major) loop will be in Auto Mode. You can cascade together as many loops as necessary on the DL05, and you may have multiple groups of cascaded loops. For proper operation on cascaded loops you must use the same data range (12/15 bit) and unipolar/bipolar settings on the major and minor loop.
Page 397: Process Alarms
The DL05 CPU has a sophisticated set of alarm features for each loop: PV Absolute Value Alarms – monitors the PV with respect to two lower limit values and two upper limit values.
Page 398: Pv Absolute Value Alarms
8–54 PID Loop Operation PV Absolute The PV absolute value alarms are organized as two upper and two lower alarms. Value Alarms The alarm status is false as long as the PV value remains in the region between the upper and lower alarms, as shown below. The alarms nearest the safe zone are named High Alarm and Low Alarm.
Page 399: Pv Rate-Of-Change Alarm
PV Rate-of-Change Alarm quickly and effectively, the PV absolute value will not reach the point where the material in process would be ruined. The DL05 loop controller provides a programmable PV Rate-of-Change Alarm, as shown below. The rate-of-change is specified in PV units change per loop sample time.
Page 400: Pv Alarm Hysteresis
8–56 PID Loop Operation PV Alarm The PV Absolute Value Alarm and PV Deviation Alarm are programmed using Hysteresis threshold values. When the absolute value or deviation exceeds the threshold, the alarm status becomes true. Real-world PV signals have some noise on them, which can cause some fluctuation in the PV value in the CPU.
Page 401: Ramp/Soak Generator
8–57 PID Loop Operation Ramp/Soak Generator Introduction Our discussion of basic loop operation noted the setpoint for a loop will be generated in various ways, depending on the loop operating mode and programming preferences. In the figure below, the ramp / soak generator is one of the ways the SP may be generated.
Page 402: Ramp/Soak Table
8–58 PID Loop Operation Now that we have described the general ramp/soak generator operation, we list its specific features: Each loop has its own ramp/soak generator (use is optional). You may specify up to eight ramp/soak steps (16 segments). The ramp soak generator can run anytime the PLC is in Run mode. Its operation is independent of the loop mode (Manual or Auto).
Page 403 8–59 PID Loop Operation The parameters in the ramp/soak table must be user-defined. the most convenient way is to use DirectSOFT, which features a special editor for this table. Four parameters are required to define a ramp and soak segment pair, as pictured below. Ramp End Value –...
Page 404: Ramp/Soak Table Flags
8–60 PID Loop Operation Many applications do not require all 16 R/S steps. Use all zeros in the table for unused steps. The R/S generator ends the profile when it finds ramp slope=0. Ramp/Soak The individual bit definitions of the Ramp / Soak Table Flag (Addr+33) word is listed in the following table.
Page 405: Ramp/Soak Profile Monitoring
8–61 PID Loop Operation The normal state for the ramp/soak control bits is all zeros. Ladder logic must set only one control bit at a time. Start – a 0-to-1 transition will start the ramp soak profile. The CPU must be in Run Mode, and the loop can be in Manual or Auto Mode.
Page 406: Troubleshooting Tips
8–62 PID Loop Operation Troubleshooting Tips Q. The loop will not go into Automatic Mode. A. Check the following for possible causes: A PV alarm exists, or a PV alarm programming error exists. The loop is the major loop of a cascaded pair, and the minor loop is not in Cascade Mode.
Page 407: Bibliography
8–63 PID Loop Operation Q. The loop Setpoint appears to be changing by itself. A. Check the following for possible causes: The Ramp/Soak generator is enabled, and is generating setpoints. If this symptom occurs on loop Manual-to-Auto Mode changes, the loop automatically sets the SP=PV (bumpless transfer feature).
Page 408: Glossary Of Pid Loop Terminology
A simple method of controlling a process, through on/off application of energy into the system. The mass of the process averages the on/off effect for a relatively smooth PV. A simple ladder program can convert the DL05’s continuous loop output to on/off control. PID Loop A mathematical method of closed-loop control involving the sum of three terms based on proportional, integral, and derivative error values.
Page 409 8–65 PID Loop Operation Proportional Gain A constant that determines the magnitude of the PID proportional term in response to the current error. PV Absolute Alarm A programmable alarm that compares the PV value to alarm threshold values. PV Deviation Alarm A programmable alarm that compares the difference between the SP and PV values to a deviation threshold value.
Page 410: Chapter 9: Maintenance And Troubleshooting
Maintenance and Troubleshooting In This Chapter..Hardware System Maintenance Diagnostics CPU Indicators Communications Problems I/O Point Troubleshooting Noise Troubleshooting Machine Startup and Program Troubleshooting...
Page 411: Hardware System Maintenance
Diagnostics Diagnostics Your DL05 Micro PLC performs many pre-defined diagnostic routines with every CPU scan. The diagnostics can detect various errors or failures in the PLC. The two primary error classes are fatal and non-fatal. Fatal Errors Fatal errors are errors which may cause the system to function improperly, perhaps introducing a safety problem.
Page 412 9–3 Maintenance and Troubleshooting V-memory Error The following table names the specific memory locations that correspond to certain Code Locations types of error messages. Error Class Error Category Diagnostic V-memory User-Defined Error code used with FAULT instruc- V7751 tion System Error Fatal Error code V7755 Major Error code...
Page 413 9–4 Maintenance and Troubleshooting DL05 Micro PLC These errors can be generated by the CPU or by the Handheld Programmer, Error Codes depending on the actual error. Appendix B provides a more complete description of the error codes. The errors can be detected at various times. However, most of them are detected at power-up, on entry to Run Mode, or when a Handheld Programmer key sequence results in an error or an illegal request.
Page 414 9–5 Maintenance and Troubleshooting Program Error The following table lists program syntax and runtime error codes. Error detection Codes occurs during a Program-to-Run mode transition, or when you use AUX 21 – Check Program. The CPU will also turn on SP52 and store the error code in V7755. Appendix B provides a more complete description of the error codes.
Page 415: Cpu Indicators
4. If the connections are acceptable, reconnect the system power and verify the voltage at the DL05 power input is within specification. If the voltage is not correct shut down the system and correct the problem.
Page 416: Communications Problems
9–7 Maintenance and Troubleshooting RUN Indicator If the CPU will not enter the Run mode (the RUN indicator is off), the problem is usually in the application program, unless the CPU has a fatal error. If a fatal error has occurred, the CPU LED should be on. (You can use a programming device to determine the cause of the error.) ...
Page 417: I/O Point Troubleshooting
If you suspect an I/O error, there are several things that could be causing the problem. High-Speed I/O configuration error A blown fuse in your machine or panel (the DL05 does not have internal I/O fuses) A loose terminal block...
Page 418 9–9 Maintenance and Troubleshooting Testing Output Output points can be set on or off in the DL05 series CPUs. If you want to do an I/O Points check out independent of the application program, follow the procedure below: Step Action ...
Page 419: Noise Troubleshooting
9–10 Maintenance and Troubleshooting Noise Troubleshooting Electrical Noise Noise is one of the most difficult problems to diagnose. Electrical noise can enter a Problems system in many different ways and they fall into one of two categories, conducted or radiated. It may be difficult to determine how the noise is entering the system but the corrective actions for either of the types of noise problems are similar.
Page 420: Machine Startup And Program Troubleshooting
9–11 Maintenance and Troubleshooting Machine Startup and Program Troubleshooting The DL05 Micro PLCs provide several features that can help you debug your program before and during machine startup. This section discusses the following topics which can be very helpful. Program Syntax Check...
Page 421 9–12 Maintenance and Troubleshooting Special There are several instructions that can be used to help you debug your program Instructions during machine startup operations. PAUSE STOP END Instruction: If you need a way to quickly disable part of the program, just insert an END statement prior to the portion that should be disabled.
Page 422 9–13 Maintenance and Troubleshooting STOP puts CPU in Program Mode Normal Program STOP In the example shown above, you could trigger X10 which would execute the STOP instruction. The CPU would enter Program Mode and all outputs would be turned off. Duplicate You can also check for multiple uses of the same output coil.
Page 423 Maintenance and Troubleshooting Run Time Edits The DL05 Micro PLC allows you to make changes to the application program during Run Mode. These edits are not “bumpless.” Instead, CPU scan is momentarily interrupted (and the outputs are maintained in their current state) until the program change is complete.
Page 424 9–15 Maintenance and Troubleshooting We’ll use the program logic shown to de- scribe how this process works. In the ex- ample, we’ll change X0 to C10. Note, the example assumes you have already placed the CPU in Run Mode. Use the MODE key to select Run Time Edits *MODE CHANGE* MODE NEXT...
Page 425 I/O point to be either on or off. Before you use a programming device to force any data type it is important you understand how the DL05 CPUs process the forcing requests. WARNING: Only authorized personnel fully familiar with the application should make program changes.
Page 426: Appendix A: Auxiliary Functions
Auxiliary Functions In This Appendix..Introduction AUX 2* RLL Operations AUX 3* V memory Operations AUX 4* I/O Configuration AUX 5* CPU Configuration AUX 6* Handheld Programmer Configuration AUX 7* EEPROM Operations AUX 8* Password Operations...
Page 427: Purpose Of Auxiliary Functions
AUX functions operate, you should supplement this information with the documentation for your choice of programming device. Note, the Handheld Programmer may have additional AUX functions that are not supported with the DL05 PLCs. AUX Function and Description DL05...
Page 428: Accessing Aux Functions Via Directsoft
A–3 Auxilliary Functions  Accessing AUX DirectSOFT provides various menu options during both online and offline Functions via programming. Some of the AUX functions are only available during online DirectSOFT programming, some only during offline programming, and some during both online and offline programming.
Page 429: Aux 2* - Rll Operations
This AUX function is available on the PLC/Clear PLC sub-menu within DirectSOFT. AUX 4* — I/O Configuration AUX 41 This AUX function allows you to display the current I/O configuration on the DL05.  Show I/O Both the Handheld Programmer and DirectSOFT will show the I/O configuration.
Page 430: Aux 5* - Cpu Configuration
The following auxiliary AUX functions allow you to setup, view, or change the CPU configuration. AUX 51 DL05 PLCs can use a program name for the CPU program or a program stored on Modify Program EEPROM in the Handheld Programmer. (Note, you cannot have multiple programs Name stored on the EEPROM.) The program name can be up to eight characters in length...
Page 431: Aux 57 Set Retentive Ranges
DirectSOFT by using the PLC/Setup sub-menu. AUX 57 DL05 CPUs provide certain ranges of retentive memory by default. Some of the Set Retentive retentive memory locations are backed up by a super-capacitor, and others are in non-volatile FLASH memory.
Page 432 AUX 5D The DL05 CPU has two program scan modes: fixed and variable. In fixed mode, the Select PLC scan time is lengthened to the time you specify (in milliseconds). If the actual scan time is longer than the fixed scan time, then the error code ’E504 BAD REF/VAL’...
Page 433: Aux 6* - Handheld Programmer Configuration
Many of these AUX functions allow you to copy different areas of memory to and Memory Areas from the CPU and handheld programmer. The following table shows the areas that may be mentioned. Option and Memory Type DL05 Default Range 1:PGM — Program $00000 – $02047 2:V — V memory $00000 – $07777 3:SYS —...
Page 434: Aux 8* - Password Operations
AUX 72 copies information from the EEPROM installed in the Handheld HPP EEPROM Programmer to CPU memory in the DL05. You can copy different portions of EEPROM (HP) memory to the CPU memory as shown in the previous table. to CPU...
Page 435: Aux 83 Lock Cpu
CPU to the factory for password removal. NOTE: The DL05 CPUs support multi-level password protection of the ladder program. This allows password protection while not locking the communication port to an operator interface. The multi-level password can be invoked by creating a password with an upper case “A”...
Page 436: Appendix B: Dl05 Error Codes
DL05 Error Codes In This Appendix..Error Code Table...
Page 437: Dl05 Error Codes
B–2 DL05 Error Codes DL05 Error Code Description E003 If the program scan time exceeds the time allotted to the watchdog timer, this SOFTWARE error will occur. SP51 will be on and the error code will be stored in V7755. To...
Page 438 B–3 DL05 Error Codes DL05 Error Code Description E360 The device connected to the peripheral port did not respond to the handheld HP PERIPHERAL programmer communication request. Check to insure cabling is correct and PORT TIME-OUT not defective. The peripheral device or handheld programmer could be defective.
Page 439 B–4 DL05 Error Codes DL05 Error Code Description E433 A SBR must be programmed after the end statement, not in the main body of INVALID SBR the program or in an interrupt routine. SP52 will be on and the error code will ADDRESS be stored in V7755.
Page 440 B–5 DL05 Error Codes DL05 Error Code Description E461 More than nine levels of logic have been stored on the stack. Check the use STACK OVERFLOW of OR STR and AND STR instructions. E462 An unmatched number of logic levels have been stored on the stack. Insure...
Page 441 B–6 DL05 Error Codes DL05 Error Code Description E501 An invalid keystroke or series of keystrokes was entered into the handheld BAD ENTRY programmer. E502 An invalid or out of range address was entered into the handheld BAD ADDRESS programmer.
Page 442 B–7 DL05 Error Codes DL05 Error Code Description E603 A search function was performed and the data was not found. DATA MISSING E604 A search function was performed and the reference was not found. REFERENCE MISSING E620 An attempt to transfer more data between the CPU and handheld OUT OF MEMORY programmer than the receiving device can hold.
Page 443: Appendix C: Instruction Execution Times
Instruction Execution Times In This Appendix..Introduction Instruction Execution Times...
Page 444: V-Memory Data Registers
Introduction This appendix contains several tables that provide the instruction execution times for DL05 Micro PLCs. Many of the execution times depend on the type of data used with the instruction. Registers may be classified into the following types: Data (word) Registers...
Page 445: Instruction Execution Times
C–3 Instruction Execution Times Instruction Execution Times Boolean Boolean Instructions DL05 Instructions Instruction Legal Data Types Execute Not Execute 2.0 ms 2.0 ms X, Y, C, T, CT, S, SP 2.3 ms 2.3 ms STRN X, Y, C, T, CT, S, SP 1.6 ms...
Page 446: Comparative Boolean Instructions
C–4 Instruction Execution Times Comparative Comparative Boolean Instructions DL05 Boolean Instruction Legal Data Types Execute Not Execute Instructions STRE 17.0 ms 16.8 ms V: Data Reg. V:Data Reg. 17.0 ms 16.8 ms V:Bit Reg. 11.7 ms 11.6 ms K:Constant 42.8 ms 42.7 ms...
Page 447 C–5 Instruction Execution Times Comparative Boolean (cont.) DL05 Instruct Legal Data Types Execute Not Execute 16.6 ms 16.5 ms V: Data Reg. V:Data Reg. 16.6 ms 16.5 ms V:Bit Reg. 11.5 ms 11.4 ms K:Constant 42.6 ms 42.5 ms P:Indir. (Data) 42.6 ms...
Page 448 C–6 Instruction Execution Times Comparative Boolean (cont.) DL05 Instruct Legal Data Types Execute Not Execute ANDE 16.6 ms 16.5 ms V: Data Reg. V:Data Reg. 16.6 ms 16.5 ms V:Bit Reg. 11.5 ms 11.4 ms K:Constant 42.6 ms 42.5 ms P:Indir.
Page 449 C–7 Instruction Execution Times Comparative Boolean (cont.) DL05 Instruc Legal Data Types Execute Not Execute 17.0 ms 16.9 ms T, CT V:Data Reg. 17.0 ms 16.9 ms V:Bit Reg. 11.7 ms 11.6 ms K:Constant 42.8 ms 42.7 ms P:Indir. (Data) 42.8 ms...
Page 450 C–8 Instruction Execution Times Comparative Boolean (cont.) DL05 Instruc Legal Data Types Execute Not Execute 16.6 ms 16.5 ms T, CT V:Data Reg. 16.6 ms 16.5 ms V:Bit Reg. 11.5 ms 11.4 ms K:Constant 42.6 ms 42.5 ms P:Indir. (Data) 42.6 ms...
Page 451 C–9 Instruction Execution Times Comparative Boolean (cont.) DL05 Instruc Legal Data Types Execute Not Execute 15.6 ms 15.6 ms T, CT V:Data Reg. 15.6 ms 15.6 ms V:Bit Reg. 10.9 ms 10.9 ms K:Constant 41.6 ms 41.6 ms P:Indir. (Data) 41.6 ms...
Page 452: Immediate Instructions
C–10 Instruction Execution Times Immediate Immediate Instructions DL05 Instructions Instruction Legal Data Types Execute Not Execute 38.2 ms 38.2 ms STRI 38.5 ms 38.5 ms STRNI 37.7 ms 37.7 ms 38.2 ms 38.2 ms ORNI 37.7 ms 37.7 ms ANDI 38.1 ms...
Page 453: Accumulator Data Instructions
C–11 Instruction Execution Times Timer, Counter, and Shift Register DL05 Instruction Legal Data Types Execute Not Execute SGCNT 76.5 ms 75.3 ms V:Data Reg. 76.5 ms 75.3 ms V:Bit Reg. 70.8 ms 69.6 ms K:Constant 106.8 ms 105.4 ms P:Indir. (Data) 106.8 ms...
Page 454: Logical Instructions
C–12 Instruction Execution Times Logical Logical (Accumulator) Instructions DL05 Instructions Instruction Legal Data Types Execute Not Execute 23.5 ms 3.9 ms V:Data Reg. 23.5 ms 3.9 ms V:Bit Reg. 48.3 ms 3.9 ms P:Indir. (Data) 48.3 ms 3.9 ms P:Indir. (Bit) 23.3 ms...
Page 455 C–13 Instruction Execution Times Math Instructions (Accumulator) DL05 Instruction Legal Data Types Execute Not Execute 157.0 ms 3.9 ms SUBD V:Data Reg. 157.0 ms 3.9 ms V:Bit Reg. 131.4 ms 3.9 ms K:Constant 201.9 ms 3.7 ms P:Indir. (Data) 201.9 ms 3.7 ms...
Page 456: Bit Instructions
C–14 Instruction Execution Times Math Instructions (Accumulator) DL05 Instruction Legal Data Types Execute Not Execute 23.0 ms 3.4 ms INCB V:Data Reg. 23.0 ms 3.4 ms V:Bit Reg. 46.8 ms 3.3 ms P:Indir. (Data) 46.8 ms 3.3 ms P:Indir. (Bit) 23.2 ms...
Page 457: Cpu Control Instructions
C–15 Instruction Execution Times CPU Control CPU Control Instructions DL05 Instructions Instruction Legal Data Types Execute Not Execute 1.1 ms 1.1 ms None 24.0 ms 24.0 ms None 10.0 ms 1.1 ms STOP None 5.9 ms 2.2 ms RSTWDT None 1.6 ms...
Page 458: Message Instructions
C–16 Instruction Execution Times Message Message Instructions DL05 Instructions Instruction Legal Data Types Execute Not Execute 65.0 ms 4.4 ms FAULT V:Data Reg. 65.0 ms 4.4 ms V:Bit Reg. 204.7 ms 4.4 ms K:Constant DLBL – – NCON – –...
Page 459: Appendix D: Special Relays
Special Relays In This Appendix..DL05 PLC Special Relays...
Page 460: Dl05 Plc Special Relays
D–2 Special Relays DL05 PLC Special Relays “Special Relays” are just contacts that are set by the CPU operating system to indicate a particular system event has occurred. These contacts are available for use in your ladder program. Knowing just the right special relay contact to use for a particular situation can save lot of programming time.
Page 461: System Monitoring
D–3 Special Relays System Monitoring SP36 Override setup on when the override function is used. relay SP37 Scan control on when the actual scan time runs over the prescribed scan time. error SP40 Critical error on when a critical error such as I/O communication loss has occurred.
Page 462: Hsio Pulse Output Relay
D–4 Special Relays HSIO Pulse SP104 Profile Complete on when the pulse output profile is completed. (Mode 30) Output Relay Communication SP116 CPU port busy on when port 2 is the master and sending data. Monitoring Relays Port 2 SP117 Communications on when port 2 is the master and has a communication error.
Page 463 D–5 Special Relays SP560 Current = target value on when the counter current value equals the value in V2360 / V2361. SP561 Current = target value on when the counter current value equals the value in V2362 / V2363. SP562 Current = target value on when the counter current value equals the value in V2364 / V2365.
Page 464 DL05 Product Weights In This Appendix..Product Weight Table...
Page 465: Product Weight Table
E–2 Product Weights Product Weight Table Weight D0–05AR 0.60 lb. (272g) D0–05DR 0.60 lb. (272g) D0–05AD 0.58 lb. (263g) D0–05DD 0.56 lb. (254g) D0–05AA 0.60 lb. (272g) D0–05DA 0.60 lb. (272g) D0–05DR–D 0.56 lb. (254g) D0–05DD–D 0.58 lb. (263g)
Page 466 European Union Directives (CE) In This Appendix..European Union (EU) Directives Basic EMC Installation Guidelines...
Page 467: Appendix F: European Union Directives (Ce)
F–2 European Union Directives European Union (EU) Directives NOTE: The information contained in this section is intended as a guideline and is based on our interpretation of the various standards and requirements. Since the actual standards are issued by other parties and in some cases Governmental agencies, the requirements can change over time without advance warning or notice.
Page 468: Special Installation Manual
Directives and to keep up with applicable Directives and/or practices that are required for compliance. As of January 1, 1999, the DL05, DL205, DL305, and DL405 PLC systems manufactured by Koyo Electronics Industries or FACTS Engineering, when properly installed and used, conform to the Electromagnetic Compatibility (EMC), Low Voltage Directive, and Machinery Directive requirements of the following standards.
Page 469: Other Sources Of Information
F–4 European Union Directives Other Sources of Although the EMC Directive gets the most attention, other basic Directives, such as Information the Machinery Directive and the Low Voltage Directive, also place restrictions on the control panel builder. Because of these additional requirements it is recommended that the following publications be purchased and used as guidelines: BSI publication TH 42073: February 1996 –...
Page 470: Suppression And Fusing
F–5 European Union Directives DL05, DL205 and DL305 AC AC Mains Filters powered base power supplies require extra mains filtering to comply with the EMC Directive on conducted RF emissions. All PLC equipment has been Schaffner FN2010 tested with filters...
Page 471: Equi-Potential Grounding
F–6 European Union Directives Equi–potential Grounding Serial Communication Cable Equi-potential Bond Adequate site earth grounding must be provided for equipment containing modern electronic circuitry. The use of isolated earth electrodes for electronic systems is forbidden in some countries. Make sure you check any requirements for your particular destination.
Page 472: Multidrop Cables
F–7 European Union Directives The recommendation is to use shielded cables as electrostatic “pipes” between apparatus and systems, and to run heavy gauge equi-potential bond wires alongside all shielded cables. When a shielded cable runs through the metallic wall of an enclosure or machine, it is recommended in IEC 1000–5–2 that the shield should be connected over its full perimeter to the wall, preferably using a conducting adapter, and not via a pigtail wire connection to an earth ground bolt.
Page 473: Dc Powered Versions
F–8 European Union Directives DC Powered Due to slightly higher emissions radiated by the DC powered versions of the DL05, and Versions the differing emissions performance for different DC supply voltages, the following stipulations must be met. The PLC must be housed within a metallic enclosure with a minimum amount of orifices.
Page 474: Items Specific To The Dl
F–9 European Union Directives Items Specific to the DL05 The rating between all circuits in this product are rated as basic insulation only, as appropriate for single fault conditions. There is no isolation offered between the PLC and the analog inputs of this product.
Page 475 Index Binary Coded Decimal instruction, 5–82, 5–84 Binary instruction, 5–83 Accumulating Fast Timer instruction, 5–33 Bit Operation Instructions, 5–78 Accumulating Timer instruction, 5–33 Boolean Instructions, 5–4, 5–9 Accumulator Stack Load Instructions, 5–43 Bumpless transfer, 8–25 Add Binary instruction, 5–72, 5–74 Add Double instruction, 5–64 Add instruction, 5–63 Agency approvals, 2–8...
Page 476 Fuse protection, 2–10 Direct-acting loop, 8–33 DirectNET, 4–35 Divide Double instruction, 5–70 Divide instruction, 5–69 Goto Subroutine instruction, 5–99 DL05 Micro PLC Gray Code instruction, 5–89 front panel, 2–4 mounting guidelines, 2–6 unit dimensions, 2–6 Drum instruction, 6–2, 6–12 chart representation, 6–3...
Page 477 Index–3 Interrupt Return instruction, 5–104 Interrupts Handheld programmer, A–6 external, 3–47 EEPROM operations, A–7 HSIO input, 3–45 timed, 3–47 HEX TO ASCII instructions, 5–87 Invert instruction, 5–85 High–speed I/O configuration, 3–5 discrete inputs with filter, 3–53 features, 3–2 high–speed counter, 3–6 Jump instruction, 7–7, 7–22 high–speed interrupts, 3–45 I/O Point Usage, 3–4...
Page 478 Index–4 Multiply Binary instruction, 5–76 Out Immediate instruction, 5–28 Multiply Double instruction, 5–68 Out instruction, 5–13, 5–52 Multiply instruction, 5–67 Output Data Instructions, 5–43 Network Configuration and Connections, 4–32 Panel layout, 2–7 Network Diagrams, 4–32, 4–33 Part Numbers, 1–5, 1–6 Network Instructions, 5–114 Password, 4–10, A–8 Network master operation, 4–41...
Page 479 Index–5 velocity, 3–30, 3–40 corresponding to error codes, 9–3 Program Control Instructions, 5–97 Specifications CPU, 4–3 Program Execution Time, 4–19 D0–05AA, 2–34 Program Mode, 4–12 D0–05AD, 2–30 D0–05AR, 2–26 Programming, concepts, 1–12 D0–05DA, 2–36 Programming Methods, 1–5 D0–05DD, 2–32 examples, 1–10 D0–05DD–D, 2–40 Proportional term, 8–34 D0–05DR, 2–28...
Page 480 Index–6 Store Positive Differential instruction, 5–15 Troubleshooting guide HSIO Mode 20, 3–24 Subroutine Return Conditional instruction, 5–99 HSIO Mode 30, 3–43 Subroutine Return instruction, 5–99 Subtract Binary instruction, 5–73, 5–75 Subtract double instruction, 5–66 Subtract instruction, 5–65 Up Down Counter instruction, 5–40 Sum instruction, 5–78 System design, 1–11 System V–memory, 4–26...