Denon ADV-700 Service Manual page 40

QQ
3 7 63 1515 0
AD1854 (DS: IC401)
DGND 1
MCLK 2
CLATCH 3
CCLK 4
CDATA 5
384/256 6
X2MCLK 7
ZEROR 8
DEEMP 9
96/48 10
AGND 11
OUTR+ 12
OUTR− 13
FILTR 14
TE
L 13942296513
SN74LV00APW
(DS: IC110, 111)
1A 1
14
1B 2
13
1Y
3
12
2A
4
11
2B
5 10
2Y 6
9
GND 7
8
AT49LV002-70TC
(DS: IC101 )
A11 1
A9 2
A8 3
A13 4
www
A14 5
A17 6
WE 7
VCC 8
*RESET 9
A16 10
.
A15 11
A12 12
A7 13
A6 14
A5 15
A4 16
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Terminal Function
Pin Name
Pin No.
1 DGND
28 DVDD
2 MCLK
27 SDATA
3 CLATCH
26 BCLK
4 CCLK
25 L/RCLK
5 CDATA
24 PD/RST
6 384/256
23 MUTE
7 X2MCLK
22 ZEROL
8 ZEROR
9 DEEMP
21 IDPM0
10 96/48
20 IDPM1
11,15 AGND
19 FILTB
12 OUTR+
18 AVDD
13 OUTR-
17 OUTL+
14 FILTR
16 OUTL−
16 OUTL-
17 OUTL+
15 AGND
18 AVDD
19 FILTB
20 IDPM1
21 IDPM0
22 ZEROL
23 MUTE
24 PD/RST
25 L/RCLK
26 BCLK
27 SDATA
28 DV
DD
SN74LV4040APW
(DS: IC114)
Vcc
QL
QF
4B
QE
4A
QG
4Y
QD
3B
QC
3A
QB
3Y
GND
32 OE
31 A10
30 CE
29 I/O7
28 I/O6
27 I/O5
26 I/O4
x ao
y
25 I/O3
24 GND
23 I/O2
i
22 I/O1
21 I/O0
20 A0
19 A1
18 A2
17 A3
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8
I/O
I Digital Ground.
I Master Clock Input.
I Latch input for control data.
I Control clock input for control data.
I Serial control input.
I Selects the master clock mode.
I Selects internal clock doubler (LO) or internal clock=MCLK (HI).
O Right Channel Zero Flag Output.
I De-Emphasis.
I Selects 48 kHz (LO) or 96 kHz Sample Frequency Control.
I Analog Ground.
O Right Channel Positive line level analog output.
O Right Channel Negative line level analog output.
O Voltage Reference Filter Capacitor Connection.
O Left Channel Negative line level analog output.
O Left Channel Positive line level analog output.
I Analog Power supply.
O Filter Capacitor connection.
I Input serial data port mode control one.
I Input serial data port mode control zero.
O Left Channel Zero Flag output.
I Mute. Assert HI to mute both stereo analog outputs.
I Power-Down/Reset.
I Left/Right clock input for input data.
I Bit clock input for input data.
Q Q
3 6 7 1 3
I Serial input.
I Digital Power Supply.
Vcc
1 16
QL
2 QK
QF QK 15
14 QJ
3 QE QJ
13
4 QH
QG QH
5
12 QI
QD QI
6
11 CLR
QC CLR
7
10 CLK
QB CLK
QA
Output
8 9
QA
u163
.
2 9 9 4 2 8
Function
1 5 0 5 8 2 9 9 4
TC74VHC123AFT
(DS: IC123)
1
1A 16
Vcc
1B
2 15 1Rext/Cext
CLR
14
1 CLR 3 1Cext
Q Q
4 1Q
1Q 13
2Q
5 12 2Q
Q Q
2Cext
6 11 2CLR
CLR
2Rext / Cext
7 10
2B
8 9
GND 2A
LC4966
(DS: IC605)
IN 1 1 VDD
14
IN C
OUT
m
OUT 1 2
CONTROL 1
13
OUT 2 3
12 CONTROL 4
IN OUT
C
co
IN 2 4
11 IN 4
C
CONTROL 2 5 OUT 4
10
OUT IN
CONTROL 3 6
9 OUT 3
C
IN OUT
VSS
7
8 IN 3
ADV-700
9 9
2 8 9 9
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