Denon ADV-700 Service Manual page 28
Hide thumbs
Also See for ADV-700:
- Operating instructions manual (318 pages) ,
- Service manual (128 pages) ,
- Brochure & specs (6 pages)
Table of Contents
Advertisement
QQ
3 7 63 1515 0
Pin No.
Pin Name
95
MA4
96
MA5
97
MA6
98
/MCE
99
/MRD
100
V
SS
101
/MWR
102
/MINT
103
TESTOUT
104
/RST
105
V
DD
106
V
SS
107
V
SS
108
NC
109
V
DD
110
HD7
111
HD8
112
HD6
113
HD9
114
HD5
115
HD10
116
V
SS
117
HD4
118
HD11
119
HD3
120
HD12
121
HD2
TE
L 13942296513
122
HD13
123
HD1
124
HD14
125
HD0
126
V
DD
127
V
SS
128
HD15
129
HDRQ
130
/HWR
131
V
hr
SS
132
/HRD
133
V
24
SS
134
IORDY
135
V
DD24
136
V
SS
137
/HDAK
138
INTRQ
139
/IOCS16
140
HA1
141
/PDIAG
142
HA0
143
VDD
144
NC
* Pin names begin with
www
.
http://www.xiaoyu163.com
I/O
µcom address input
I
µcom address input
I
µcom address input
I
I
Chip enable signal input
µcom chip read signal input
GND pin
µcom write signal input
I
µcom interrupt signal output, open drain, pull-up R built-in
O
O
Output for test, leave it open
I
Hardware reset input (CMOS level), pull-up R built-in
Power pin
GND pin
GND pin
Power pin
I/O
I/O
I/O
Host data in/output (HD [0:15] : IDE sig. DD [0:15]), TTL level, tri-statte out, pull-up R built-in
I/O
I/O
I/O
GND pin
I/O
I/O
I/O
I/O
I/O
Host data in/output (HD [0:15] : IDE sig. DD [0:15]), TTL level, tri-statte out, pull-up R built-in
I/O
I/O
I/O
I/O
Power pin
GND pin
I/O
Host data in/output (HD [0:15] : IDE sig. DD [0:15])
O
Data request output: IDE sig. DMARQ, tri-state out, drive-ability 12mA
I
Host write signal input: IDE sig. /DIOW, TTL level, pull-up R built-in
GND pin (for /HR)
I
Host read signal input: IDE sig. /DIOR, TTL level, pull-up R built-in
GND pin (for IORDY)
O
IO transfer ready output: IDE sig. IORDY, tri-state out, drive-ability 24mA
Power pin (for IORDY)
GND pin
I
Data acknowledge input: IDE sig. /DMACK, TTL level, pull-up R built-in
O
Interrupt signal output: IDE sig. INTRQ, tri-state out, drive-ability 12mA
O
Data bit wide select output: IDE sig. /IOCS16, open drain, pull-up R built-in
I
Host address 1 input: IDE sig. DA1, TTL level, pull-up R built-in
I/O
Post diagnostic in/output: IDE sig. /PDIAG, TTL level, tri-state out, pull-up R built-in
I
Host address 0 input: IDE sig. DA0, TTL level, pull-up R built-in
Power pin
PSYNCN, and PDRQN are active L terminals.
x
ao
u163
y
i
http://www.xiaoyu163.com
2 9
8
Function
Q Q
3
6 7
1 3
1 5
co
.
ADV-700
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
28
Hide quick links:
Advertisement
Table of Contents
