Denon ADV-700 Service Manual page 25

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Pin No. Pin Name
109 BD12
110 V
SS5
111 BD13
112 BD14
113 BD15
114 NC
115 NC
116 V
DD3
117 PLCK
118 TESM5
119 TESM6
120 TESM7
121 TESM8
122 V
SS3
123 CFC1
124 CFC2
125 PPW
126 PESV
127 PVSS
128 PESP
129 PDOP1
130 PDON1
131 PDOP2
132 PDON2
133 LPFN
134 LPFO
135 PV
REF
136 VCO
REF
137 VCOF
138 PV
DD
139 SLCO1
TE
L 13942296513
140 TESM9
141 TEST2
142 RFCD
143 RFDVD
144 AV
DD
145 RFCT
146 RFZI
147 TEZI
148 AWIN
149 AV
SS
150 FEI
151 TEI
152 RFSB
153 RFRP
154 SAV
SS
155 TESM10
156 EXTAD
157 V
REF
158 FOO
159 TRO
160 AV
DD
161 AWCTL
162 FMO
163 DMO
164 TEBC
165 FEBC
166 DPDC
167 EQBC
168 ANMON
www
169 /DFCT
170 VRCK
171 V
SS3
172 SCD
.
173 SCL
174 SCB
175 FGIN
176 NC
* Pin names begin with
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I/O
I/O External RAM data in/output
GND for 5V
I/O External RAM data in/output
I/O External RAM data in/output
I/O External RAM data in/output


3.3V digital power
I/O PLL block clock in/output
Test pin, Connect to GND
Test pin, Connect to GND
Test pin, Open
Test pin, Open
3.3V digital GND
O VCO frequency control signal, Analog output pin
O VCO frequency control signal, Analog output pin
O Phase comparator offset adj. V out, Analog output pin
I Phase comparator offset adj. sig. in, Analog input pin
GND for 3.3V PLL block
O Phase comparator offset adj. sig. out, Analog output pin
O DVD/CD phase control sig. (positive), Analog output pin
O DVD/CD phase control sig. (negative), Analog output pin
O DVD/CD phase control sig. (positive), Analog output pin
O DVD/CD phase control sig. (negative), Analog output pin
I Data PLL low pass filter inverted input, Analog input pin
O Data PLL low pass filter output, Analog output pin
Ref. V for data PLL block
I VCO reference, Analog input pin
I VCO auto-adj. filter out, Analog input pin
Power for 3.3V PLL block
O Data slice 6bitDAC out, Analog output pin
Test pin, Open
I Test mode pin, Connect to V
I CD RF signal input, Analog input pin
I DVD RF signal input, Analog input pin
Power for 3.3V analog block
I RFRP center V input (zero-cross intake), Analog input pin
I RFRP signal input (zero-cross intake), Analog input pin
I Tracking error signal input (zero-cross intake), Analog input pin
I Active wide PLL control signal input, Analog input pin
GND for 3.3V analog block
I Focus error signal input, Analog input pin
I Tracking error signal input, Analog input pin
I RF level or sub beam signal add input, Analog input pin
I RFRP signal input, Analog input pin
GND for 3.3V analog block
Test pin, Connect to V
REF
I Universal outside ADC input, Analog input pin
Ref. V (1.65V) for analog block
O Focus EQ output, Analog output pin
O Tracking EQ output, Analog output pin
Power for 3.3V analog block
O Active wide PLL control output, Analog output pin
O Focus EQ output, Analog output pin
O Disc EQ output, Analog output pin
O Tracking balance control signal, Analog output pin
O Focus balance control signal, Analog output pin
O DPD error signal pit depth adj. signal, Analog output pin
O RF wide boost adj. signal, Analog output pin
O Universal PWM output, Analog output pin
O Black dot detect signal
O x RF EQ characteristic control clock ao u163
y
3.3V digital GND
O Head amp serial data
i
O Head amp serial data latch pulse
O Head amp serial data clock
I Disc FG signal input (w/self-bias circuit), Feedback R/Analog input pin

are active L terminals.
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2 9
8
Function
Q Q
3 6 7 1 3 1 5
DD3
co
.
ADV-700
9 4 2 8
0 5 8 2 9 9 4 2 8
m
9 9
9 9
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