Yamaha DSP-AX1/RX-V1 Service Manual page 75

A B C
SCHEMATIC DIAGRAM (DSP(1)-1)
1
4.8
4.1
4.8
0 -0.1
4.1
-0.8
4.8
0 0
-0.6 -0.6
2 0
0
3.1
2.5
4.8
0 0
0.03
0
0
3
2.5
0
3.1
0.3 0
0
0
2.5
0
0
3.1
0.3
0
4
0
4.7
4.7
5
3.5
3.5
2.5
3.5
4.7
6
4.7
0
0
0 0
0
0
7
11.6
2.4
2.4
2.4
2.4
2.4
2.4
8
0
2.4
2.4
2.4
2.4
2.4
-11.6
9
IC46 :
4 Channel OP-Amp
µ
IC38 : PC4570G2
IC45 : NJM2904M-T1
OUT A 1
Dual OP Amp
–IN A 2 – +
10
+IN A 3
OUT 1 1 8 +V CC
V+
4
–IN 1 2 7 OUT 2
+INB 5
+ – + –
+IN 1 3 6 –IN 2
–INB 6
– +
–V CC 4 5 +IN 2
OUT B 7
D E F
4.7
4.8
4.8
0
2.5
0
4.8
0
0.3 0
4.8
4.8
4.8
4.0 0
0 4.8
0
0
0.3
4.8
4.8
4.8
4.3
0 4.8 0
0
4.8
0.3
0
4.8
4.4
0
0
~
0 4.8
0
0 0
0
0
0
0
DIR5
4.7
4.7
3.5
0
2.5
q
w
4.8
2.4
4.8
ADC
0
2.4
0
0
2.4
0
2.4
4.8
µ
PC4574G2 IC4, 36, 37 : HD74HC00FPEL IC39, 40 : TC74HCUO4AFEL IC42 : TC74HC125AF
Quad 2 Input NAND Hex Inverters Quad 3 State Bus Buffers
14 OUT D A1 1 14 V DD 1A 1 14 V DD 1C 1
A D
+ – 13 –IN D B1 2 13 B4 1Y 2 13 6A 1A 2
+IN D
12 Y1 3 12 A4 2A 3 12 6Y 1Y 3
V–
11 A2 4 11 Y4 2Y 4 11 5A 2C 4
10 +INC B2 5 10 B3 3A 5 10 5Y 2A 5
9 –INC Y2 6 9 A3 3Y 6 9 4A 2Y 6
+ –
B C
8 OUT C V 7 8 Y3 V 7 8 4Y GND 7
SS SS
G H
4.8
-0.5
2.4
0.7
2.4
-4.8
4.7
RAM
4.7 4.7
3.8 4.7
2.4 4.7 4.7
0
4.7 4.7
0
4.7 4.7
4.7 0 0
0 e 4.7 4.7
1.2
4.7 0
1.2
2.3 4.7
4.7
1.2
0
0 1.2
0
0
0
0
0
0
AC-3 RF DEMODULATOR
4.7 4.7
4.7
0
0
1.2
0 4.7
0 0
4.7 0
4.8
4.8
4.8 0
4.8 0
~
~
~
~
4.8
4.8
SUB CPU 4.8
4.8
4.8
4.8
4.8
4.7 4.8
0
0
0 r
0
0
4.8
1.4
4.8 1.4
0
4.8
4.8
0
0
0
IC43, 44 : HD74HC151FPEL
IC41 : TC74HC126AF
Quad 3 State Bus Buffers 8 to 1 Data Selectors
INPUTS OUTPUTS
16 15 14 13 12 11 10
SELECT STROBE
14 Vcc 1C 1 14 Vcc Y W
C B A S
D4 D5 D6 D7 A B
X X X H L H
13 4C 1A 2 13 4C
L L L L D0 D0
D3 C
L L H L D1 D1
12 4A 1Y 3 12 4A
L H L L D2 D2
D2 D1 D0 Y W S
L H H L D3 D3
11 4Y 2C 4 11 4Y
H L L L D4 D4
H L H L D5 D5 1 2 3 4 5 6 7
10 3C 2A 5 10 3C
H H L L D6 D6
H H H L D7 D7
9 3A 2Y 6 9 3A
8 3Y GND 7 8 3Y
I J K
3.2
2.4
0
2.4
4.7 ~
4.7 0
AC3Dav
4.7
LSt/RSt
0
0
0
0 0
0 3.2
0 0
2.0 0
0 0 MATRIX 6.1/DTS ES
1.2 0
DECODER
0 0
0
0
0
0
LS/RS
RC
3.2
2.4
2.4
~
0
AC3D2av
DIGITAL
0
3.2
3.2
0
0 DOLBY DIGITAL/DTS/PRO LOGIC
0
DECODER
0
0
0
0
0
IC3 : AK5383-VS
24 bit 2ch A/D Converter
12 11 14 13 16
VREFL
1 VOLTAGE SERIAL OUTPUT
GNDL 2 REFERENCE INTERFACE
9 VCOML 3
AINL+ 4 DELTA-SIGMA DECIMATION
HPF
MODULATOR FILTER
AINL– 5
ZCAL 6
AINR+ 25 DELTA-SIGMA DECIMATION
HPF
AINR– MODULATOR FILTER
24
VCOMR 26
8
VREFR 28 VOLTAGE CALLBRATION
CONTROLLER
GNDR REFERENCE SRAM
27
23 22 21 9 10 7
L M N
DSP-AX1/RX-V1
Point q (Pin 9 of IC2)
V : 2V/div, H : 50 nsec/div
DC, 1 : 1 probe
0V
Point w (Pin 11 of IC2)
V : 2V/div, H : 50 nsec/div
DC, 1 : 1 probe
0V
0
0
0
Point e (Pin 56 of IC24)
V : 2V/div, H : 50 nsec/div
DC, 1 : 1 probe
3.2
0
0V
Point r (Pin 13 of IC1)
V : 2V/div, H : 50 nsec/div
DC, 1 : 1 probe
4.8
0V
IC25 : W24258S-70LE-EL10
32K X 8 bits Static RAM
A14 1 28 VDD
A12 2 27 WE
A7 3 26 A13
A6 4 25 A8
A5 A9
5 24
A4 6 23 A11
A3 7 22 OE
A2 8 21 A10
A1 9 20 CS
A0 10 19 I/O8
I/O1 11 18 I/O7
I/O2 I/O6
12 17
I/O3 13 16 I/O5
VSS I/O4
14 15
0
L/R
0 CLK GEN PRECHARGE CKT
0
LSt/RSt
~ A12 2
~
A14 1
~
A2 8
C/LFE
A3 7
CORE CELL ARRAY
512 ROWS
A4 6
64 x 8 COLUMNS
3.2 A5 5
0
A6
4
0
A7
3
0
A13
0 26
0 I/O1 11 I/O CKT
DATA
CNTRL
0 I/O8 19 COLUMN DECODER
0
CLK
0 GEN
0
4.8 WE 27
CS
20
OE 22
23 21 9 10 25 24
15 SDATA
HPFE
19
MCLK
17
18 DFS
* All voltage are measured with a 10MΩ/V DC electric volt meter.
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to those
8 originally installed.
* Schematic diagram is subject to change without notice.
E-90/J-82