Denon adv-m71 Service Manual page 28
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Also See for adv-m71:
- Operating instructions manual (340 pages) ,
- Specifications (2 pages) ,
- Operating instructions manual (113 pages)
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Pin
Pin Name
No.
28
XOUT
29
XIN
30
DVDD
31
DGND
32
EMPHA/UO
33
AUDIO/VO
34
CKST
35
INT
36
RERR
37
DO
38
DI
39
CE
40
CL
41
XMODE
42
DGND
43
DVDD
44
TMCK/PIO0
45
TBCK/PIO1
46
TLRCK/PIO2
47
TDATA/PIO3
48
TXO/PIOEN
* For latch-up countermeasure, perform each power supply ON/OFF in the same timing.
TE
L 13942296513
MX29LV160ABTC-70 (ME: U10))
A15
1
A14
2
A13
3
A12
4
A11
5
A10
6
A9
7
A8
8
A19
9
NC
10
WE
11
RESET
12
NC
13
NC
14
RY/BY
15
A18
16
A17
17
A7
18
A6
19
A5
20
A4
21
A3
22
A2
23
A1
24
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http://www.xiaoyu163.com
I/O
O
X'tal osc. connecting output terminal
I
X'tal osc. connection, external clock input terminal (24.576MHz or 12.288MHz)
—
Digital power
—
Digital GND
I/O
Emphasis information/U-data output/Chip address setting terminal
I/O
Non-PCM detect/V-flag output/ Chip address setting terminal
I/O
Clock switch transition period output/Demodulation master or slave function switching terminal
Interrupt output for ∝com (Interrupt factor selectable)/Modulation or general I/O switching terminal
I/O
O
PLL lock error, data error flag output
∝com I/F, read out data output terminal (3-state)
O
∝com I/F, write data input terminal
I
∝com I/F, chip enable input terminal
I
∝com I/F, clock input terminal
I
I
System reset input terminal
—
Digital GND
—
Digital power
I/O
256fs system clock input for modulation/General I/O in/output terminal
I/O
64fs bit clock input for modulation/General I/O in/output terminal
I/O
fs clock input for modulation/General I/O in/output terminal
I/O
Serial audio data input for modulation/General I/O in/output terminal
O/I
Modulation data output/ General I/O enable input terminal
48
A16
47
BYTE
46
GND
45
Q15/A-1
44
Q7
43
Q14
42
Q6
41
Q13
40
Q5
39
Q12
38
Q4
37
VCC
36
Q11
35
Q3
34
Q10
33
Q2
32
Q9
31
Q1
30
Q8
29
Q0
28
OE
27
GND
26
CE
25
A0
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2 9
8
Function
Q Q
3
6 7
1 3
1 5
BLOCK DIAGLAM
CONTROL
CE
OE
INPUT
WE
LOGIC
RESET
ADDRESS
LATCH
A0-A19
AND
BUFFER
Q0-Q15/A-1
co
.
28
ADV-M71
9 4
2 8
0 5
8
2 9
9 4
2 8
WRITE
PROGRAM/ERASE
STATE
HIGH VOLTAGE
MACHINE
(WSM)
STATE
REGISTER
FLASH
ARRAY
ARRAY
SOURCE
COMMAND
HV
DATA
Y-PASS GATE
DECODER
PGM
SENSE
DATA
COMMAND
AMPLIFIER
HV
DATA LATCH
PROGRAM
DATA LATCH
m
I/O BUFFER
28
9 9
9 9
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