Power Supply Circuits - Icom IC-F5061 Servise Manual

PLL IC
The PLL circuit provides stable oscillation of the transmit
frequency and receive 1st LO frequency. The PLL output
frequency is controlled by the divided ratio (N-data) from the
CPU.
The applied signals are divided at the prescaler and
programmable counter according to the control signals
("SSO," "PLST" and "SCK") from the CPU. The divided signal
is phase-compared with the reference frequency signal from
the reference frequency oscillator (X1, pin 3), at the phase
detector.
5-4 POWER SUPPLY CIRCUITS (MAIN UNIT)
Voltage from the attached battery pack is routed to whole of the circuit in the transceiver via switches and regulators.

• POWER SUPPLY CIRCUITS

CPU (IC14),
EEPROM (IC16),
etc.
RF power amplifier (IC15)
etc.
AF power amplifier (IC21)
etc.
Transmitter circuits
Common circuits
Receiver circuits
PLL IC (IC4)
Attached optional units,
D/A converters,
etc.
HV
T8V
T8V
regurator
Q34, Q37, D37
+8V +8V
regurator
Q38, Q39
IC20
R8V
R8V
"RXC"
regurator
+5V
+5V
regurator
Q35, Q36
The phase difference is output from pin 4 as a pulse type
signal after being passed through the internal charge pump.
The output signal is converted into the DC voltage (lock
voltage) by passing through the loop filter (Q8, Q9). The lock
voltage is applied to the variable capacitors (D10 and D13
of RX VCO1, D8 and D9 of RX VCO2, D14 and D17 of TX
VCO), and locked to keep the VCO frequency constant.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the VCO oscillating frequency.
IC18
CPU5
CPU5
regurator
Q47, Q48
Power switch
VCC
46 41
47
(IC14)
CPU
5 - 4
Power Supply
HV
Voltage line
Control signal