The PLL IC contains a prescaler, programmable counter,
programmable divider and phase detector, etc. The entered
signal is divided at the prescaler and programmable counter
section by the N-data ratio from the CPU. The divided signal
is detected on phase at the phase detector using the refer-
ence frequency.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the oscillated frequency.
4-3-2 VCO CIRCUIT (MAIN UNIT)
The VCO circuit contains a separate RX VCO (Q17, D9) and
TX VCO (Q16, D10, D13). The oscillated signal is amplified
at the buffer amplifiers (Q15, Q29) and is then applied to the
T/R switch (D16, D17). Then the receive 1st LO (Rx) signal
is applied to the 1st mixer (Q6) and the transmit (Tx) signal
to the YGR amplifier circuit (PA unit; Q704).
A portion of the signal from the buffer amplifier (Q15) is feed
back to the PLL IC (IC21, pin 6) via the buffer amplifier (Q14)
as the comparison signal.
• PLL CIRCUIT
Buffer
Q21
"LVIN" signal to the CPU
(IC22, pin 49)
45.9 MHz 2nd LO
signal to the FM IF IC
(IC9, pin 2)
RX VCO
Q17, D11
TX VCO
Q16, D13
Loop
filter
Phase
4
detector
Programmable
divider
Tripler
10
3
Q22
4-4 POWER SUPPLY CIRCUIT
4-4-1 MAIN UNIT VOLTAGE LINE
LINE
VCC
The voltage from the connected battery pack.
Common 5 V converted from the VCC line at the
+5 regulator circuit (IC7). The output voltage is
+5V
supplied to buffer amplifiers (Q21), PLL IC
(IC21),etc.
Common 5 V converted from the VCC line at the
S5V
S5 regulator circuit (Q26–Q28). The output volt-
age is supplied to the ripple filter (Q20), etc.
Receive 5 V converted from the S5V line at the
R5 regulator circuit (Q25). The output voltage is
R5V
supplied to the tripler (Q22), FM IF IC (IC9), IF
amplifier (Q7), 1st mixer (Q6), RF amplifier (Q5),
etc.
Transmit 5 V converted from the S5V line at the
T5V
T5 regulator circuit (Q24). The output voltage is
supplied to the APC amplifier (IC16), PA unit etc.
Buffer
Q15
IC21 LMX2352
Programmable
Prescaler
counter
Shift register
X2
15.3 MHz
4 - 4
DESCRIPTION
D17
Buffer
to 1st mixer circuit
Q29
D16
to transmitter circuit
Buffer
Q14
LPF
6
14
SCK
15
SO
16
PLST
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