Chapter 8
Counters
Other Counter Features
Sample Clock
GATE
SOURCE
Counter Value
Sample Clock
Buffer
Time N
t
At t
, the counter is armed. No measurements are taken until the counter is armed.
0
0
t
The rising edge of Gate indicates the beginning of the first period to measure. The counter begins counting
1
rising edges of Source.
t
The rising edge of Sample Clock indicates that the USB-621x device should store the result of the measurement
2
of the current period when the period ends.
t
The rising edge of Gate indicates the end of the first period. The USB-621x device stores the counter value in
3
the buffer.
t
The rising edge of Gate indicates the end of the second period. Sample Clock did not assert during this period,
4
so the counter discards the measurement of the second period.
t
The rising edge of Gate indicates the end of the third period. Sample Clock asserts during this period, so the
5
USB-621x device stores the measurement in the buffer.
NI USB-621x User Manual
When taking counter measurements, you can enable a sample clock. When
you use a sample clock, measurements are saved after an active edge of the
sample clock. Figure 8-28 shows an example of using a sample clock with
a buffered period measurement. In this example, a period is defined by
two consecutive rising edges of the Gate.
Counter Armed
1
t
t
0
1
2
3
4
1
4
4
t
t
2
3
Figure 8-28. Sample Clock Example
8-32
2
1
2
3
4
3
t
t
4
5
1
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